Field-Programmable Gate Arrays

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MicroBlaze and RAM Application

Hi all. I'm more or less a beginner in using Xilinx tools and System. Now I'm working with a Spartan 3E Evaluation Boar...
1 comments posted 20yrs
posted by alfredo.aletto
1 comments posted 20yrs posted by alfredo.aletto

Interface of 8051 microcontroller with FPGA Block RAM

Hi, Can I use Block RAM for data storage in a system involving micro-controller which writes into Block RAM as a buffer...
7 comments posted 20yrs
posted by makarand.deshmukh
7 comments posted 20yrs posted by makarand.deshmukh

spartan 3e starter kit usb cable

Hi all, Recently I bought a Spartan 3E starter kit board and met some configuration problems. As indicated in the user...
4 comments posted 20yrs
posted by eejju
4 comments posted 20yrs posted by eejju

V2PRO30 Check

Group, Can somebody check my understanding on the V2PRO30? I currently have some LVTTL single ended signals that are cu...
2 comments posted 20yrs
posted by robnstef
2 comments posted 20yrs posted by robnstef

PCI/PCI-X IDSEL

Hi i am designing a PCI-X 64-bit 66 Mhz Device in FPGA, connected with a SBC (without backplane), the Spec says that ID...
3 comments posted 20yrs
posted by yy7d6
3 comments posted 20yrs posted by yy7d6

easics - crc equations

Does anyone know what happened to the easics.com site ? I wanted to use their CRC equation generator. This was working...
2 comments posted 20yrs
posted by brucenutbrown
2 comments posted 20yrs posted by brucenutbrown

MPMC2 : npi issues

Hi, I am exploring the possibility to use the npi(native port interface) towards the MPMC2(multi port memory controller...
2 comments posted 20yrs
posted by ivo
2 comments posted 20yrs posted by ivo

FFT IP CORE: XFFTV2.0

Who has once used the fft ip core: xfft v2.0? Can you gave me some advice?
1 comments posted 20yrs
posted by zyl-02042101
1 comments posted 20yrs posted by zyl-02042101

Number of Modules in a Verilog File

Hi, Is there any method to increase number of verilog modules/instances in a single verilog file, While sythesizing wit...
0 comments posted 20yrs
posted by jitendrakumawat
0 comments posted 20yrs posted by jitendrakumawat

Spartan 3 PCI-X 133Mhz

Hi has anyone have tried to implement a PCI-X 133Mhz core in a Xilinx Spartan 3 FPGA?
1 comments posted 20yrs
posted by yy7d6
1 comments posted 20yrs posted by yy7d6

virtex xcv:no way to see TDO moving:

hi to all the ng for practicing vhdl at home 3 months ago i builded a modified cable 3 and i tried to make my pc commun...
1 comments posted 20yrs
posted by blisca
1 comments posted 20yrs posted by blisca