Hi all.
I'm more or less a beginner in using Xilinx tools and System. Now I'm working with a Spartan 3E Evaluation Board to check the feature and to start developing FW code.
Enviroment is EDK, I mean XPS, version 8.1.02i. ISE 8.1.03i.
My questions:
1) In case of big application it is not possible just use only BRAM. Anyway the ONLY way to fit the big application into DDR RAM is just use a bootloader which, for esxample, get the big applic. binary via UART (DCE port) and copy it into RAM and then bootloader jump to RAM itself ? I have notice it's possible set linker options for applications, in particulary to decide about linker zone for every code type are (.text, .data, and so on). Moreover it's possible seto linker to DDR RAM area for each or all of these sections. This feature is just useful only to create the application to be linked into RAM or there is a tip "to link & loading in automatic" our big application in RAM? (Avoiding avery time the copy step into RAM via UART port)2) How much is really a "good performance cache" the which one created inside BRAM block versus the other one possible created into DDR RAM via "cache linked Otion" in BSB wizard ?
Thanks in advance for any answers.
Cheers,
Alfre.