Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15254 Threads Posts
to

Worth reading in Field-Programmable Gate Arrays

Sparan S3E availability update

Hi not so long time Xilinx projected 'general customer' availabily of S3E 500 devices mid-july (2005), any update on tha...
6 comments posted 21yrs
posted by antti
6 comments posted 21yrs posted by antti

"Tbufs don't exist"

I've heard this rumor many times from different sources: that Virtex4 TBUFs don't actually have tri-state buffers in th...
4 comments posted 21yrs
posted by falkjack
4 comments posted 21yrs posted by falkjack

Serial vs Chipscope

dear I implemented some multiprocessors and some routers. 3 processors exchange data via routers and store into local m...
3 comments posted 21yrs
posted by pasacco
3 comments posted 21yrs posted by pasacco

Can't run Xilinx 7.1SP3 on FC3

has anyone been able to run SP3 on a Fedora Core 3 system? SP2 worked fine but SP3 is broken. Running XST gets, xst: er...
2 comments posted 21yrs
posted by bjrosen
2 comments posted 21yrs posted by bjrosen

virtex 4 configuration error

Hello. I am trying to use the ML402 virtex4 (SX35) board and facing some problems getting the FPGA to configure. I dont...
0 comments posted 21yrs
posted by abgoyal
0 comments posted 21yrs posted by abgoyal

Interface Wi-Fi with FPGA

Hi, I've made a lot of research recently on the best way to integrate a wi-fi connection to my FPGA system. I've identi...
0 comments posted 21yrs
posted by gabsterblue
0 comments posted 21yrs posted by gabsterblue

Compilation error with Synplify attribute

I used the syn_preserve synplify attribute in my VHDL code as below. attribute syn_preserve of sign1: signal is true; M...
2 comments posted 21yrs
posted by muthusnv
2 comments posted 21yrs posted by muthusnv

Linux Fedora and Xilinx ISE

Hallo, I would use webpack on linux. I would know if ISE Webpack 7.1 for Red Hat enterprise functions on Fedora. If I d...
2 comments posted 21yrs
posted by marcotoschi
2 comments posted 21yrs posted by marcotoschi

Xilinx: Clock speeds 420MHz+ tested in Spartan-3

Hi, There have been different claims of being faster and bigger from different sides. The best thing to know it for rea...
2 comments posted 21yrs
posted by antti
2 comments posted 21yrs posted by antti

Xilinx MPEG

Hi! I have downloaded the MPEG-packages from Xilinx (Application notes 610,615,616 and 621) and I have trouble compilin...
0 comments posted 21yrs
posted by johan.riesbeck
0 comments posted 21yrs posted by johan.riesbeck

Virtex-4 5V tolerance

Hi, is there any difference between Virtex-II and Virtex-4 5V tolerence? I did not find any information about that. I w...
4 comments posted 21yrs
posted by kalte
4 comments posted 21yrs posted by kalte

NIOS II + USB 2.0 host

Hi, We will soon be using the Nios II as embedded controller and we would like to add a High Speed (HS) USB 2.0 hosting...
6 comments posted 21yrs
posted by bjskill
6 comments posted 21yrs posted by bjskill