Xilinx XST 6.x and Verilog-2001?

Hi,

Does Xilinx XST 6.x support RTL-synthesis of Verilog-2001?

This document

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shows that the older version, XST 5.x, has partial support for Verilog

2001.

I was wondering if the support is better in the newer version of ISE.

In particular, I'm interested in knowing if 'generate' works, and whether arrays of instances work. The latter was actually added to the language in 1995, but XST 5.x doesn't seem to support it.

Regards, Allan.

Reply to
Allan Herriman
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Yes. You can see the main improvements at:

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XST supports both of these in version 6.1i.

Steve

Reply to
Steve Lass

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