Hello all I am struggling with ISE and CoreGen to generate a memory block that would be customizable (mainly in depth & width) through generic parameters. The Memory block generator datasheet seems to indicate that this is possible but does not explain how. All there is is the parameters list.
ISE keeps telling me "Port of instance has different type in definition " I don't have any component named blk_mem (I had generated one with the GUI but I have deleted it and removed from ISE project)
Thanks in advance Nicolas