Field-Programmable Gate Arrays

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16-bit microprocessor dore for Actel

Can anyone recommend a 16-bit microprocessor core to use in an Actel ProAsic+ device. I'm familiar with Altera Nios and...
9 comments posted 20yrs
posted by amyler
9 comments posted 20yrs posted by amyler

Internal clock for apex20ke

Hi all i am trying to generate an internalo clock for the apex20ke device which has to be implimented using quarus tool...
0 comments posted 20yrs
posted by vryaag
0 comments posted 20yrs posted by vryaag

IPIF interface not fast enough

I've a project with a powerpc and some userperipherals (connected through ipif at the plb bus). The plb bus is running...
3 comments posted 20yrs
posted by someone
3 comments posted 20yrs posted by someone

Small C Compiler for Picoblaze

Dear all, last year I started to design the back end of a "Small C" compiler for the picoblaze microcontroller. (You ca...
3 comments posted 20yrs
posted by francesco_poderico
3 comments posted 20yrs posted by francesco_poderico

a ISE installation problem on linux

I've got some trouble on installing ise7.1 webpack on the debian linux system, when I run the .sh file from the command...
2 comments posted 20yrs
posted by springzzz
2 comments posted 20yrs posted by springzzz

I am planning to purchase a Virtex-4 Eval board.

I am looking at Avnet's Xilinx-4 LX Evaluation Kit. Has anyone here worked with this board? Is it worth the Money? Is t...
3 comments posted 20yrs
posted by chris
3 comments posted 20yrs posted by chris

Sythesis software for Virtex-4

Hi, I are looking to purchase some FPGA software in the very near term for a project utilizing Xilinix's Virtex-4 devic...
9 comments posted 20yrs
posted by chris
9 comments posted 20yrs posted by chris

Spartan-3 starter kit and digilent jtag-usb cable

Bought the starter board from xilinx and the jtag-usb cable fro digilent I've had the starter board a few weeks. And se...
1 comments posted 20yrs
posted by miti0200
1 comments posted 20yrs posted by miti0200

Image Processing Algorithm based on FPGA?

Hi everyone!Who have been done this aspect?I want to do this,but i don't how to do.Can you give some advice?For example...
0 comments posted 20yrs
posted by seabrench
0 comments posted 20yrs posted by seabrench

How to run ngcbuild in windows xp environment?

Hi, How to run ngcbuild in windows xp environment? Does it run only at command line? How can I run command line in windo...
2 comments posted 20yrs
posted by shihhsin.hu
2 comments posted 20yrs posted by shihhsin.hu

chipscope pro

I have a working design where I can see the ouput on the leds .I am using a ML310 board . The design doesnt seem to wor...
9 comments posted 20yrs
posted by nitesh.guinde
9 comments posted 20yrs posted by nitesh.guinde

Spartan3E - problem in creating LVDS DDR pads

Hi all, I am trying to create LVDS, bidirectional, DDR I/O pads in a Spartan-3E chip (xc3s500e). I've created an I/O pa...
3 comments posted 20yrs
posted by assaf_sarfati
3 comments posted 20yrs posted by assaf_sarfati

vhdl state maching problem

following is a part of the state machine im trying to design. when start is set to '1' it goes to rw_1. when in that st...
6 comments posted 20yrs
posted by manusha
6 comments posted 20yrs posted by manusha