Field-Programmable Gate Arrays

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A state machine design problem

Hi, I have the following VHDL code for a state machine: type Output_State_t is ( State_a, State_b, State_c); signal Out...
1 comments posted 5yrs
posted by wtxwtx
1 comments posted 5yrs posted by wtxwtx

Synthesis : Pan's Algorithm

Have anyone studied Pan's Algorithm previously ? http://people.eecs.berkeley.edu/~alanmi/publications/2005/iwls05_smr.p...
0 comments posted 5yrs
posted by feiphung
0 comments posted 5yrs posted by feiphung

Measuring ps of delays in FPGAs

Hi FPGA Experts, How can we measure ps of delays in FPGA with minimum area and good accuracy ? Today's TDC (Time to Dig...
0 comments posted 5yrs
posted by gparthu
0 comments posted 5yrs posted by gparthu

Enterpoint dev board manuals

Hi folks, It looks like Enterpoint (www.enterpoint.co.uk) has closed down. I've got one of their Drigmorn2 dev boards a...
0 comments posted 5yrs
posted by philpem
0 comments posted 5yrs posted by philpem

How to run ModelSim overnight with display off

Hi, I want to run ModelSim overnight when I am sleeping. How to run an application overnight with the display off in th...
9 comments posted 5yrs
posted by wtxwtx
9 comments posted 5yrs posted by wtxwtx

Notepad++ is an excellent editor for coding VHDL

Hi, In the working process for my private project, I use free Notepad++ to code VHDL code and appreciate it very much!...
1 comments posted 5yrs
posted by wtxwtx
1 comments posted 5yrs posted by wtxwtx

Using MachXO2 as a SRAM device

Hi, I have an application where replacing the configuration of the FPGA will occur frequently and hence I do not want t...
0 comments posted 5yrs
posted by peter.pan
0 comments posted 5yrs posted by peter.pan