A loop problem which does not do what is expected

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Hi,
I have a problem that does not do what is expected.

I have several modules linked together from top to bottom. Each module has 3 error output signals: Error_O, Error_Level_O, and Error_Code_O. If a module has an error, Error_O = '1', Error_Level_O and Error_Code_O have their proper error info.

There are 3 arrays to correct that information from each of those modules: Error_O_m(), Error_Level_O_m(), and Error_Code_O_m(). All those arrays are confirmed to get the right values.

What I want to do is to latch the error information.

A1 : process(RESET, CLK)
    variable Error_O_v : std_logic;
    variable Error_Level_O_v, Error_Code_O_v : integer;
        
    procedure INIT is
    begin
        Error_O <= '0';
        Error_Level_O <= 0;
        Error_Code_O <= 0;
    end procedure INIT;

begin
    if RESET = '1' then
        INIT;
    elsif rising_edge(CLK) then
        if SINI = '1' then
            INIT;
        else
            Error_O_v := '0';
            Error_Level_O_v := 0;
            Error_Code_O_v := 0;
                
             -- propbelm may be here!
            for j in 0 to G_TOP_LEVEL loop
                if Error_O_v = '0' then
                    if Error_O_m(j) = '1' then
                        Error_O_v := '1';
                        Error_Level_O_v := j;
                        Error_Code_O_v := Error_Code_O_m(j);
                    end if;
                end if;
            end loop;    
                
            -- hope to latch error info into 3 output ports
            if Error_O = '0' and Error_O_v = '1' then
                Error_O <= '1';
                Error_Level_O <= Error_Level_O_v;
                Error_Code_O <= Error_Code_O_v;
            end if;
        end if;
    end process;

During simulation, I found that 3 error signals latch nothing, keeping their initial values unchanged.

What is wrong?

Thank you.

Weng

Re: A loop problem which does not do what is expected
On Friday, June 18, 2021 at 7:33:01 AM UTC-7, Tianxiang Weng wrote:
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Hi,
I rewrote the above code, but it still does not work.

in the project package, I define the following function:
function Get_Index (x: std_logic_vector) return integer is
    variable index : integer;
begin
    index := 0;
    for j in x'low to x'high loop
        if x(index) = '1' then
            index := j; -- if j-th bit is asserted, it returns j+1, to distinguish 0 as no bit set
            return index;
        end if;
    end loop;
    return 255; -- no bit is asserted
end Get_Index;

---------------------------------------

Error_p : process(RESET, CLK)
    variable v_Index : integer;
    procedure INIT is
    begin
        Error_Oi <= '0';
        Error_Level_O <= 0;
        Error_Code_O <= 0;
    end procedure INIT;
begin
    if RESET = '1' then
        INIT;
    elsif rising_edge(CLK) then
        if SINI = '1' then
            INIT;
        else
            v_Index := Get_Index(Error_O_m);
            if v_Index /= 255 then
                Error_O <= '1';
                Error_Code_O <= Error_Code_O_m(V_Index);
                Error_Level_O <= v_Index;
            end if;    
        end if;
    end if;
end process;

Thank you.

Weng

Re: A loop problem which does not do what is expected
On Friday, June 18, 2021 at 5:31:05 PM UTC-7, Tianxiang Weng wrote:
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Hi Hans and Rick,

Please help me! I don' work for any company and nobody can help me except the web.

Weng

Re: A loop problem which does not do what is expected
On 19/06/2021 07:13, Tianxiang Weng wrote:
Quoted text here. Click to load it
Hi Weng,

Fortunately I do work for a company and free time is very scares. This  
newsgroup is probably also not the best place to ask VHDL questions,  
stack exchange or the many vendor mailing lists might be better.

I just had a quick look at your code and in your first example no  
latching occurs as you never assert Error_O_v so your loop is never entered:

Error_O_v := '0';
for j in 0 to G_TOP_LEVEL loop
   if Error_O_v = '0' then  -- always 0
      if Error_O_m(j) = '1' then
         Error_O_v := '1';

In your second example you never clear Error_O but instead you clear  
Error_Oi. So I suspect you get an 'X' for Error_O?

Simulation should answer all your questions, just keep your code as  
simple as possible.

Good luck,
Hans
www.ht-lab.com





Re: A loop problem which does not do what is expected
On Saturday, June 19, 2021 at 1:13:30 AM UTC-7, HT-Lab wrote:
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Hi Hans,
Thank you for your help.

Error_O_v := '0';         -- its value is initialized here
for j in 0 to G_TOP_LEVEL loop
...if Error_O_v = '0' then -- always 0?  it is true on first entry
......if Error_O_m(j) = '1' then  -- an error happens if true
..........Error_O_v := '1';          -- it is refreshed here if an error is detected, after that above if-condition = false, and all remaining testing skips

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You are right, but it is an error that is corrected after my posting, Error_Oi is introduced to be the internal value of output port Error_O for VHDL-2002: Error_O <= Error_Oi; after compiling,  Error_O <= '1' is corrected as Error_Oi <= '1';.

After reading your text, I added the signal Get_Index_View  to see what happens to it when an error happens.

v_Index := Get_Index(Error_O_m);
Get_Index_View <= v_Index; -- added signal to watch after Get_Index(Error_O_m)
if v_Index /= 255 then
    Error_Oi <= '1';
    Error_Code_O <= Error_Code_O_m(v_Index);
    Error_Level_O <= v_Index;
end if;    

Simulation shows Get_Index_View  = 255 always.

function Get_Index (x: std_logic_vector) return integer is
...variable index : integer;
begin
...index := 0;
...for j in x'low to x'high loop
......if x(index) = '1' then
.........index := j;  
.........return index;  -- ?, no action!
......end if;
...end loop;
...return 255; -- always! simulation shows!
end Get_Index;

I would like to hear your advice on how to implementing the function. I think my version should be the simplest.  

Thank you.

Weng

Re: A loop problem which does not do what is expected
On 19/06/2021 11:20, Tianxiang Weng wrote:
Quoted text here. Click to load it
.. snip

Hi Weng,


index will remain 0 if x(0) is '0', perhaps you want "if x(j)='1'" ?

I would suggest you single step through your design as this will show  
you the issue. Just open the file in the Modelsim editor, set a  
breakpoint on the index:=0 line hit run -all then single step through  
the design.

Good luck,

Regards,
Hans.
www.ht-lab.com

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Re: A loop problem which does not do what is expected
On Saturday, June 19, 2021 at 6:43:41 AM UTC-7, HT-Lab wrote:
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Hi Hans,
Under your guidance, the problem is resolved. Here is my latest version of Get_Index:

function Get_Index (x: std_logic_vector) return integer is
begin
......for j in x'low to x'high loop
............if x(j) = '1' then   -- it is the error you help me to find, originally if x(index) = '1' then
..................return j;
............end if;
......end loop;
......return 255; -- no bit is asserted
end Get_Index;

This error gave me a deep lesson: I must check again and again to make sure no design error exists!  

Thank you very much!!!

Weng

Re: A loop problem which does not do what is expected
On Friday, June 18, 2021 at 8:31:05 PM UTC-4, Tianxiang Weng wrote:
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I can't tell if your Get_Index procedure works.  You initialize index to 0 which is the value used to index X the first time through.  But the value returned is X'low if that first X(index) is '1'.  

The comment, -- if j-th bit is asserted, it returns j+1, to distinguish 0 as no bit set" seems to be saying the value returned should be either j+1 or 255 if no '1' bits are found.  

index := 0;  
if x(index) = '1' then  
 index := j;  
 return index;  
 end if;  
end loop;  
return 255;

This looks wrong to me.  I would try....

index := 255;
if x(j) = '1' then  
 index := j+1;  
 return index;  
 end if;  
end loop;  
return index;

--  

Rick C.

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Re: A loop problem which does not do what is expected
On Sunday, June 20, 2021 at 8:26:38 AM UTC-7, snipped-for-privacy@gmail.com wrote:
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Hi Rick,
I have found the error indicated by Hans, and before your posting, I post my final result:  

function Get_Index (x: std_logic_vector) return integer is
begin
......for j in x'low to x'high loop
............if x(j) = '1' then -- it is the error you help me to find, originally if x(index) = '1' then
..................return j;
............end if;
......end loop;
......return 255; -- no bit is asserted
end Get_Index;

My code is simpler than yours.

Thank you.

Weng

Re: A loop problem which does not do what is expected
On Sunday, June 20, 2021 at 1:18:18 PM UTC-4, Tianxiang Weng wrote:
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Yes, your code is more simple, but does not do what you specified.  

Your comment, "-- if j-th bit is asserted, it returns j+1, to distinguish 0 as no bit set" clearly asks for the value of J+1 to be returned if index J is asserted.  Your code does not do that, it returns the value J or 255 if no bit is set.  

So is your specification wrong, or is the code wrong?  

It is not at all infrequent that failures in code is directly related to failures in the specification.  That's why it is important to start with a well designed specification and test the code to the specification at the unit level.  

At this point I have no idea if your code is wrong or if your specification is wrong.  

--  

Rick C.

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