Field-Programmable Gate Arrays

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Little help for Spartan 2 and 3 Programmer

I like to work with Spartan but my computer have not the parallel port it just has serial and USB , Is there any program...
1 comments posted 19yrs
posted by sadatakhavi.ali
1 comments posted 19yrs posted by sadatakhavi.ali

MPMC2 : npi issues #2

This is a follow-up from my previous discussion. ivo, "MPMC2 : npi issues" #, 31 Aug 2006 1:44 am I am now able to get...
1 comments posted 19yrs
posted by ivo
1 comments posted 19yrs posted by ivo

ISE Simulator Error 222: SuSE 10.1 Linux

Hi, i tried to simulate a small vhdl design with xilinx ISE (8.1 - 8.2 spxx, Webpack or foundation) running SuSE 10.1 l...
4 comments posted 19yrs
posted by gauckler
4 comments posted 19yrs posted by gauckler

A strange problem of Chipscope

Hello, I am trying to design a multiprocessor system for my master project. Chipscope is necessary to debug the system....
7 comments posted 19yrs
posted by quickwayne
7 comments posted 19yrs posted by quickwayne

SSFP16 GPL licensed 16 Fpga processor released

Hi, the original announcement is at the bottom of the thread there http://www.mikrocontroller.net/forum/read-9-411815.h...
4 comments posted 19yrs
posted by Antti.Lukats
4 comments posted 19yrs posted by Antti.Lukats

independent reviews of EDA tools?

Does anyone know of any reviews of different tools, or have any experiance with any of the 3rd party tools, good or bad...
0 comments posted 19yrs
posted by mmdst23
0 comments posted 19yrs posted by mmdst23

old computer architecture book

Regarding the Fairchild Symbol IIr computer, and other obsolete architectures, I suggest reading the old book (out of p...
1 comments posted 19yrs
posted by stanmazor
1 comments posted 19yrs posted by stanmazor

XPLA3 going obsolete?

I am looking at using the XPLA3 in a new design and am having trouble finding an evaluation board. So I started looking...
8 comments posted 19yrs
posted by gnuarm
8 comments posted 19yrs posted by gnuarm

Board Opinions TS7300

Ran across this board the other day, was wondering if anyone has any experiences with it, good or bad. Also, not really...
3 comments posted 19yrs
posted by ziggy
3 comments posted 19yrs posted by ziggy

lwip xilinx

hi. well thanks for all the help with my previous problem. of course i ran into another one already.... i have the foll...
0 comments posted 19yrs
posted by u_stadler
0 comments posted 19yrs posted by u_stadler

coolrunner II jtag

Hi I need to interface a coolrunner II using SSTL. This is all quite straightforward and fully documented. However I wo...
0 comments posted 19yrs
posted by colin_toogood
0 comments posted 19yrs posted by colin_toogood

How to handle UCF file

How do other people handle this problem. The UCF file assemble requirements form two different areas: Things like timin...
3 comments posted 19yrs
posted by bon
3 comments posted 19yrs posted by bon

System Generator Bug

Hi, I found a bug inthe System Generator 8.2i. Every time when I click on the DSP block under Xilinx Reference Blockset...
0 comments posted 19yrs
posted by kuan.zhou
0 comments posted 19yrs posted by kuan.zhou