ISE Simulator Error 222: SuSE 10.1 Linux

Sep 18, 2006 4 Replies

Hi,



i tried to simulate a small vhdl design with xilinx ISE (8.1 - 8.2 spxx, Webpack or foundation) running SuSE 10.1 linux, unfortunately there is an error. Because the VHDL code simulates with SuSE 9.2 I assume the code is fine and there are no spaces in the file path.



Started : "Check Syntax". Running vhpcomp Compiling vhdl file "/home/PBuser2/parity/parity.vhd" in Library isim_temp. Entity compiled. Entity (Architecture ) compiled. Compiling vhdl file "/home/PBuser2/parity/tb_parity.vhd" in Library isim_temp. Entity compiled. Entity (Architecture ) compiled. Parsing "tb_parity_vhd_stx.prj": 0.03



Process "Check Syntax" completed successfully



Running Fuse ... Parsing "tb_parity_vhd_beh.prj": 0.00 Building tb_parity_vhd_isim_beh.exe ERROR:Simulator:222 - Generated C++ compilation was unsuccessful



Has anybody simulated ISE isim under SuSE 10.1. Any hint is appreciated.



Andreas



Same thing with just ISE - no solution. Sorry. This really is something Xilinx should be sorting.

Rog.

Hi Andreas/Roger,

I am afraid that SuSe is not an officially supported Linux distribution by Xilinx currently. We are evaluating the need for support of SuSe for future releases of Xilinx Tools though. Right now RH3.0 and 4.0 are the only oficiallly supported Linux Distributions. if you would like to request the priority raised on the SuSe support, please contact your nearest FAE and let them know.

Thanks Duth

Roger wrote:

Hi Andreas,

There is something you could try:

It is very likely caused due to missing libstdc++.so.5. Suse 10 ships with libstdc++.so.6. If you install libstdc++ compatibility package (which has libstdc++.so.5) on your system the design should work. The compatibility package can be found here:

formatting link

Thanks Duth

Duth wrote:

Hi Duth, thank you for your help. After exchanging the ld-files (/usr/bin --> $XILINX/gnu ..) the simulator runs.

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