Hi
I need to interface a coolrunner II using SSTL. This is all quite straightforward and fully documented.
However I would allso like to do boundary scan testing on this bus using SSTL voltage levels and I can find no mention that when an IOB is doing boundary scan it can reference a vref pin. The documented IOB does not show where the IOB boundary scan cell is.
If anyone can shed some light on this I would appreciate it as I'm otherwise ready to have the board laid out.
Regards all
Colin