Latest threads in Field-Programmable Gate Arraysshow only best voted threads
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Low End FPGAs
So I'm looking at various platforms for general purpose, fairly low-end FPGAs, and it looks like the Lattice ECP5, Xilinx Artix-7, and Altera Cyclone V E all have options in the sort of * 170ish IO *...
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7 years ago
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Four_Bit_Counter in VHDL
I am implementing four-bit-counter but I am getting value of x for Port_co unter in auto-counting. (VHDL code) and http:/ / (testbench). I already finished the two flip-flop in VHDL. I am now stuck...
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7 years ago
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Looking for Xilinx HW-130/HW-120 Adapters
My project needs to program a Xilinx XC7336 44PLCC. I have the software now and the HW-130 programming unit. Also have the HW-137-PC44/VQ44 adapter which I assumed would work with the XC7336, but as...
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7 years ago
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PADS part for ZYNQ
Hi, Does anyone have a PADS-PCB part (schematic+pcb decal) for the 484-ball ZYNQ? -- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott...
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7 years ago
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BASYS 3 Board
Anyone interested or need additional help using the BASYS 3 board? I have created a course on Udemy, here is a link for more information and a $10 coupon. If you have additional questions feel free to...
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7 years ago
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Lattice Mico32 Simulation in Modelsim
Hi, I have written a Mico32 application in C. Now I want to simulate my Mico32 system in the Modelsim simulator including the C application (toggling some LEDs, ISR for controling 7 SEGMENT display)....
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7 years ago
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The Problem with Christianity
The Problem with Christianity: Ken Ham lays out the problem with Christianity very very clearly: Best regards, Rick C. Hodgin
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7 years ago
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pin configuration for I2C on altera Max 10 using i2c_opencores IP
Hi, I am using a max 10 FPGA, and trying to communicate with an I2C slave. I am using the HSMC connector to connect to another board where the I2C sla ve is located. I have tested the SDA and SCL...
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7 years ago
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Altera Ethernet MAC without DMA
Hi all, I have a design that uses Altera Ethernet MAC and I would like to connect it to NIOS without DMA. Any suggestions? Thanks,
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7 years ago
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Vivado parses wicked slow
Vivado is supposed to be really fast, but I've noticed it parses really slo wly. To test this I timed it. I have a design with about 20 lines of code . It uses an undeclared reg. If I try to compile...
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7 years ago
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Constant Mult: The State of High Level Synth (Part II)
Here's another example that shows just how far removed we are from high-level synthesis. I need to multiply a 10-bit number by 956. I could use a DSP48, but it's overkill, and to meet timing I'd...
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7 years ago
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Mod-24: The State of High-Level Synthesis in 2016
It's 2016 and I still have to write out most of my code at very low levels of abstraction like I did ten years ago. Whenever I hear about a new tool that supposedly converts C to gates, I don't even...
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7 years ago
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Lattice Diamond 3.7 and Synplify
I am trying to run the latest version of Lattice Diamond free edition. When I attempt to synthesize through the Diamond GUI I get "error code 3". I've opened a ticket with Lattice support but after 2...
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7 years ago
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Lattice MachXO2 breakout board - replacing FPGA with different one ?
Hi, I have a couple of that neat boards with XO2-7000 and not much else. I managed to burn the FPGA on one of them and since Farnell didn't have the exact 7000HE model that was on the board, I used...
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7 years ago
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need some help with altera quartus
Hi all, To learn VHDL and FPGAs, I bought a number of boards, one of them being this one: It's a Altera cyclone IV with 16 Mbit of serial flash (M25P16/EPSC16) to store the configuration file. Next to...
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7 years ago
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