Latest threads in Field-Programmable Gate Arraysshow only best voted threads
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Need help in capturing serial data using FPGA and ethernet interface
hello, i want to capture 2 mbps serial data stream through my ethernet card. i already have a Virtex FPGA based hardware and I want to add it this data logging funtionality. I want to use FPGA to...
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20 years ago
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VHDL variable setup and propogations
Greetings, I am having a strage time with some code I recently wrote to implement a UART - the code is working fine now, but a problem cropped up that is baffling me. This design is being synthesized...
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20 years ago
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Re: memory
Yes, this is correct. This delay is the difference between the DQ line length on the PCB and the DQS line length on the PCB. If the DQ lines are 1.5 inches, the DQS lines need to be 1.5 inches + 4.2...
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20 years ago
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ARM C/C++ compiler independent of OS
i want to use some ARM C/C++ compiler which is independent of the operating system. What i am looking for is plain translation of my C/C++ benchmarking code into plain ARM assebly and then into...
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20 years ago
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VirtexII bitstream relocation
Hi all I have questions about bitstream relocation in VirtexII FPGAs. We have already developed software based on the old Jbits package from Xilinx for doing small bits manipualations bitstream...
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20 years ago
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Celoxica feedback
Can anyone provide feedback on Celoxica. Do they meet all of the claims? Performance obtained ? Pros and cons?
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20 years ago
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Re: Quartus produces wrong parameters for Stratix PLL
news:... news:... In Stratix devices there are two types of PLLs - Enhanced PLLs and Fast PLLs. The Megawizard performs a feasibility check to make sure the resulting parameters the compiler will...
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20 years ago
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Re: Suitable motherboard for Spartan-IIE PCI design
Hi, There are a number of boards available. You should look for a server class motherboard, one that supports PCI-X or at least PCI at 66 MHz. A board that supports either of those will be (by...
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20 years ago
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Re: fpga video evaluation board
"Jun" ha scritto nel messaggio news: I'd purchase one myself, should that contains also: - a strip for piggy back modules, with at least 8 bit + clock + 3 ctrl lines, to test different decoders, or...
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20 years ago
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Re: Cyclone vs Spartan-3
free Hab auch ein paar S3-50 in der Schublade... Weiss aber immer noch nicht ob die Blockrams und DLL's haben oder nicht ? Gruss MIKE for our english readers: I also have some spartan3-50 devices, but...
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20 years ago
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Re: Xilinx ML300 JTAG Configuration Problem
there is not much I can share (yet) but: the impact/xps download to ML300 freezes some times, problem has been fixed by restarting rebooting, sometimes pressing the "fpga prog" button. the fpga prog...
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20 years ago
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Re: Asynchronous RESET?
Perhaps I did not explain well enough: Use the asynchronous reset the way you want to. Then generate a synchronous signal that lasts a little longer than the asynchronous reset, and use this...
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20 years ago
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device selection for game system
I'm working on implementing a custom game boy advance cartrige with the following features: - 4-16MByte flash rom (bank switched to a 24 pin buss) - 32kbyte save ram (game state save, can be stored in...
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20 years ago
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EDK/XPS/Virtex2Pro - TFT core not avaialble
Hi I am trying to use xilinx PLB TFT LCD core with EDK/XPS but the core is not even listed, it is in the cores directory (marked obsolete) ML300 TFT works well with xilinx demos, but there is no EDK...
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20 years ago
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NAND flash file
Does anyone know where I can find the xapp354_verilog or xapp354_VHDL files for NAND flash? I went to the Xilinx ftp site, and they were not listed there. Thanks.--Matt
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20 years ago
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