Latest threads in Field-Programmable Gate Arraysshow only best voted threads
| Subject | Author | Posted | Replies | |
|---|---|---|---|---|
|
|
Re: Quartus bug or wrong VHDL?
Hi Martin, Finally got an answer for you on this. This is indeed a bug in the Quartus extractors; your test case was helpful in tracking down this problem. Apparently the extractor guys had been...
—
|
19 years ago
|
— | |
|
|
Re: regarding I2C protocols
"Tauno Voipio" wrote in message news:5LHJa.361$ up. must Hi, I have done this with a Lattice 1016 (64 registers) The start condition, SCL high and SDA falling is to put the device in lets call it...
9
|
19 years ago
|
9 | |
|
|
Re: Q: regarding I2C protocols
Anything can happen. Please consider combinations of fast CPUs and sudden power-loss or reset in _all_ phases of the protocol. Remember for example the "I2C Edge Conditions" problem. Wolfgang Denk
—
|
19 years ago
|
— |