Latest threads in Field-Programmable Gate Arraysshow only best voted threads

Subject Author Posted Replies
 
GDB from my university...
CS302 ? Digital Logic Design Graded Discussion Board You are required to program a PAL device to design a 64-bit counter. The st ated PAL can be programmed using ABEL (Advanced Boolean Expression...
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PLL dynamic phase shift
Why ck_dynamic is having period of 0.822ns when it is stated to be of 333MHz frequency?
 
A state machine design problem
Hi, I have the following VHDL code for a state machine: type Output_State_t is ( State_a, State_b, State_c); signal Output_State, Output_State_NS : Output_State_t ; At a clocked process, there is code...
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Synthesis : Pan's Algorithm
Have anyone studied Pan's Algorithm previously ? 1. How is Pan's algorithm being a shortest-path algorithm when clock period is computed across the critical path (longest path) ? 2. Any idea about the...
 
Why Xilinx Ten Gigabit Ethernet PCS/PMA IP Core 32-bit version use less resources than 64-bit version?
The 32-bit version should have better latency performance but I think it's more complex, so it should use more resources. But as the link below 32-bit version is better in all kinds of aspects of...
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Measuring ps of delays in FPGAs
Hi FPGA Experts, How can we measure ps of delays in FPGA with minimum area and good accuracy ? Today's TDC (Time to Digital Converter) architectures suffer lot of drawbacks like high gate utilization,...
 
How long does it take to fill up an array prior to sorting?
Most sorting algorithms I've noticed seem to have an interface somewhat lik e this: void someAlgorithm ( elemType[] elements); So to implement this algorithm an application needs to fill the...
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A loop problem which does not do what is expected
Hi, I have a problem that does not do what is expected. I have several modules linked together from top to bottom. Each module has 3 error output signals: Error_O, Error_Level_O, and Error_Code_O. If...
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Enterpoint dev board manuals
Hi folks, It looks like Enterpoint ( has closed down. I've got one of their Drigmorn2 dev boards and some of the addon modules. Does anyone have a copy of these documents? - Ethernet PHY schematic...
 
How to eliminate a troublesome warning from ModelSim
Hi, From the first day when I started using ModelSim, a troublesome warning from ModelSim accompanies me each time I use ModelSim. I use Notepad++ to edit my *.vhd files, after recompiling the files,...
 
How to run ModelSim overnight with display off
Hi, I want to run ModelSim overnight when I am sleeping. How to run an application overnight with the display off in the laptop with Windows 10? Is there a shortcut keystroke to turn the screen off...
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How to turn off cursor note pane when cursor stops at wave pane of ModelSim
Hi, How to turn off the cursor note pane when the cursor stops at the wave pane of ModelSim during simulation? A cursor note pane is shown at the wave pane of ModelSim with yellow background color...
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All my PDF files suddenly become Chrome HTML Document! Why?
Hi, Overnight all my PDF files suddenly become Chrome HTML Document! Why? Are there some new things happening with Adobe policy on their free Read DC software yesterday? Thank you. Weng
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Notepad++ is an excellent editor for coding VHDL
Hi, In the working process for my private project, I use free Notepad++ to code VHDL code and appreciate it very much! Here is an example of how powerful Notepad++ is: In 27 files, I easily found that...
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Using MachXO2 as a SRAM device
Hi, I have an application where replacing the configuration of the FPGA will occur frequently and hence I do not want to use the built-in FLASH. Having an always-blank device on the board is perfectly...