Field-Programmable Gate Arrays

Looking for Xilinx HW-130/HW-120 Adapters

My project needs to program a Xilinx XC7336 44PLCC. I have the software now and the HW-130 programming unit. Also have...

2 comments posted 9yrs

posted by TimRegeant

2 comments posted 9yrs posted by TimRegeant

PADS part for ZYNQ

Hi, Does anyone have a PADS-PCB part (schematic+pcb decal) for the 484-ball ZYNQ? -- John Larkin Highland Technology, I...

0 comments posted 9yrs

posted by jjlarkin

0 comments posted 9yrs posted by jjlarkin

BASYS 3 Board

Anyone interested or need additional help using the BASYS 3 board? I have created a course on Udemy, here is a link for...

0 comments posted 9yrs

posted by jjchristman13

0 comments posted 9yrs posted by jjchristman13

Lattice Mico32 Simulation in Modelsim

Hi, I have written a Mico32 application in C. Now I want to simulate my Mico32 system in the Modelsim simulator includi...

4 comments posted 9yrs

posted by noreeli.schmidt

4 comments posted 9yrs posted by noreeli.schmidt

The Problem with Christianity

The Problem with Christianity: Ken Ham lays out the problem with Christianity very very clearly: https://www.youtube.com...

0 comments posted 10yrs

posted by rick.c.hodgin

0 comments posted 10yrs posted by rick.c.hodgin

pin configuration for I2C on altera Max 10 using i2c_opencores IP

Hi, I am using a max 10 FPGA, and trying to communicate with an I2C slave. I am using the HSMC connector to connect to...

2 comments posted 10yrs

posted by tomberge

2 comments posted 10yrs posted by tomberge

Altera Ethernet MAC without DMA

Hi all, I have a design that uses Altera Ethernet MAC and I would like to connect it to NIOS without DMA. Any suggestion...

2 comments posted 10yrs

posted by jakab.tanko

2 comments posted 10yrs posted by jakab.tanko

Vivado parses wicked slow

Vivado is supposed to be really fast, but I've noticed it parses really slo wly. To test this I timed it. I have a desi...

21 comments posted 10yrs

posted by kevin.neilson

21 comments posted 10yrs posted by kevin.neilson

Constant Mult: The State of High Level Synth (Part II)

Here's another example that shows just how far removed we are from high-level synthesis. I need to multiply a 10-bit nu...

6 comments posted 10yrs

posted by kevin.neilson

6 comments posted 10yrs posted by kevin.neilson

Mod-24: The State of High-Level Synthesis in 2016

It's 2016 and I still have to write out most of my code at very low levels of abstraction like I did ten years ago. Whe...

24 comments posted 10yrs

posted by kevin.neilson

24 comments posted 10yrs posted by kevin.neilson

Lattice Diamond 3.7 and Synplify

I am trying to run the latest version of Lattice Diamond free edition. When I attempt to synthesize through the Diamond...

9 comments posted 10yrs

posted by gnuarm

9 comments posted 10yrs posted by gnuarm

Lattice MachXO2 breakout board - replacing FPGA with different one ?

Hi, I have a couple of that neat boards with XO2-7000 and not much else. I managed to burn the FPGA on one of them and...

3 comments posted 10yrs

posted by brankob

3 comments posted 10yrs posted by brankob

need some help with altera quartus

Hi all, To learn VHDL and FPGAs, I bought a number of boards, one of them being this one:...

4 comments posted 10yrs

posted by kristoff

4 comments posted 10yrs posted by kristoff

Problem with Lattice Diamond IPExpress software.

Not sure what to make of this problem, I am having IPexpress in Lattice Diamond generate a corrupted file if I define a...

0 comments posted 10yrs

posted by cbayona

0 comments posted 10yrs posted by cbayona

Lattice Diamond and VHDL-2008

I don't have any trouble getting the simulation (Active HDL) or synthesis (Synplify) tools to work with VHDL-2008, but...

6 comments posted 10yrs

posted by gnuarm

6 comments posted 10yrs posted by gnuarm