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- Peter Alfke
July 1, 2003, 3:53 pm
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Perhaps I did not explain well enough:
Use the asynchronous reset the way you want to.
Then generate a synchronous signal that lasts a little longer than the
asynchronous reset, and use this synchronous reset signal to either
drive Clock Enable inactive, or to force D Low. This overrides the
trailing end of the asynchronous Resst, and lets the flip-flop "wake up"
in a synchronous fashion, which is easy to simulate...
Peter Alfke
===================
Nial Stewart wrote:
Use the asynchronous reset the way you want to.
Then generate a synchronous signal that lasts a little longer than the
asynchronous reset, and use this synchronous reset signal to either
drive Clock Enable inactive, or to force D Low. This overrides the
trailing end of the asynchronous Resst, and lets the flip-flop "wake up"
in a synchronous fashion, which is easy to simulate...
Peter Alfke
===================
Nial Stewart wrote:
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