Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15254 Threads Posts
to

Picoblaze C Compiler

Hi all, On www.poderico.co.uk you can download the free C compiler for Picoblaze version 1.7.7 In the next 2 months the...
10 comments posted 20yrs
posted by francesco.poderico
10 comments posted 20yrs posted by francesco.poderico

PLB

I want to verify few of my concepts about Processor Local Bus (CoreConnect) in Xilinx FPGA. I know each master on PLB i...
0 comments posted 20yrs
posted by fpgalearner
0 comments posted 20yrs posted by fpgalearner

the problem when I design the udma33 interface

When I test my udma33 interface , I write the first sectors with LBA address mode,but the datas I read from the same add...
2 comments posted 20yrs
posted by bjzhangwn
2 comments posted 20yrs posted by bjzhangwn

expanding multipliers, problem

Hello all, I am attempting to expand the 18x18 multipliers as provided in the xilinx Spartan 3 series. I followed the p...
4 comments posted 20yrs
posted by rover8898
4 comments posted 20yrs posted by rover8898

Virtex-4 MGTPower Distribution

Hi! We are are planning a project were we want to use 8 MGT receivers at 10Gbps on an FX20. The layout for the power su...
0 comments posted 20yrs
posted by news
0 comments posted 20yrs posted by news

Spartan 3E Starter Board Question

I have never done an FPGA design and I am considering purchasing the Starter Board. It has crossed my mind to implement...
1 comments posted 20yrs
posted by dave
1 comments posted 20yrs posted by dave

Async FPGA ~2GHz

For those interested in Async devices, and uses : http://www.achronix.com/news.html?newsID=72&PHPSESSID=f6e19bf363bdcb0...
52 comments posted 20yrs
posted by no.spam
52 comments posted 20yrs posted by no.spam

USB slot on Xilinx ML310 board - linux platform

Dear Group, I wonder if anyone in this group has successfully used USB slot for anything (say camera, mouse or any devi...
0 comments posted 20yrs
posted by narashimanc
0 comments posted 20yrs posted by narashimanc

Xilinx Map vs IOB tri-state with clock enable...

I'm using XST 8.1 SP3 with a Spartan3 design. I'm trying to use both the output and tri-state flip-flops in the IOB, bu...
1 comments posted 20yrs
posted by johnp3+nospam
1 comments posted 20yrs posted by johnp3+nospam

clock multiplication

Hi there, I have a low frequency variable clock frequency (for vari-speed audio tasks) in the range of 39 KHz to 50 KHz...
7 comments posted 20yrs
posted by dancedynamix
7 comments posted 20yrs posted by dancedynamix

XST Internal error: VHDL constant record support

Hi All, Just wanted to know if anyone has experienced any problems with Xilinx XST when declaring a constant record in...
3 comments posted 20yrs
posted by ajg112
3 comments posted 20yrs posted by ajg112

Xilinx ML401 Virtex 4 USB Peripheral

Hi, I have a Xilinx ML401 board and need to use the USB ports provided to transfer data at high speed from the board to...
0 comments posted 20yrs
posted by alastairlynch
0 comments posted 20yrs posted by alastairlynch