Field-Programmable Gate Arrays

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Dell Laptop for Embedded Work

Hi: I'm considering to buy a Dell Precision M90 laptop to replace a regular PC on a cart that was used to wheel around...
43 comments posted 19yrs
posted by crcarleRemoveThis
43 comments posted 19yrs posted by crcarleRemoveThis

Xilinx MIG fails

I cannot get the MIG to work in Core Generator. I've written Xilinx, but hope I can get a faster answer here. I used th...
2 comments posted 19yrs
posted by kjhales
2 comments posted 19yrs posted by kjhales

NIOS speed

I would like to evaluate the true performance of the various CPU cores available for FPGAs and I found that the "econom...
4 comments posted 19yrs
posted by gnuarm
4 comments posted 19yrs posted by gnuarm

Interrupts in Microblaze

Hi, I wanted to deal with interrupts in Microblaze project. I would like to procesor react to int from swich or a button...
2 comments posted 19yrs
posted by jerzy.zielinski
2 comments posted 19yrs posted by jerzy.zielinski

DCM multiplier and EDK design

I have a Xilinx EDK based design for a Virtex II Pro using the PowerPC Processor. There are two DCMs in the processor s...
3 comments posted 19yrs
posted by sgfallows
3 comments posted 19yrs posted by sgfallows

DCM and domain crossing

Hi, I have a question regarding Xilinx DCM. If a clock signal is generated by DCM (say 2X) and used to drive another cl...
3 comments posted 19yrs
posted by nobody
3 comments posted 19yrs posted by nobody

Fast Platform for ISE?

the PC market is changing quite fast and I would like to get an update on the question from July ... back then I heard...
9 comments posted 19yrs
posted by MSchoeberl
9 comments posted 19yrs posted by MSchoeberl

iMPACT: Problem in downloading bit file

Hi, When I was donwloading bit files to the target FPGA device, the process ran up to around 95% and error message appe...
3 comments posted 19yrs
posted by czinyan1983
3 comments posted 19yrs posted by czinyan1983

Profiling issue with EDK 7.1

Hi, I am profiling some piece of code using some techXclusive article (the root of all evil) but I change it to a ppc40...
1 comments posted 19yrs
posted by jfhasson
1 comments posted 19yrs posted by jfhasson

Verification errors using Xilinx Spartan 3E board

Hi! I have been working on a design lately where I use a the Xilinx Spartan 3E starter kit board. I use a logic analyse...
5 comments posted 19yrs
posted by zkcmbcyk9
5 comments posted 19yrs posted by zkcmbcyk9

Lattice ispMACH4000 eval boards

I want to do some testing on some of the low power CPLDs and I can't find a decent test board for the Lattice ispMACH40...
4 comments posted 19yrs
posted by gnuarm
4 comments posted 19yrs posted by gnuarm

MV4.0.1 and Avnet Mini-Module

Has anyone been able to get montavista4.0.1 to build a 2.6 kernel for the mini-module? I get a build but the kernel cra...
3 comments posted 19yrs
posted by someone
3 comments posted 19yrs posted by someone

Which soft core to use?

Assuming it must be free + open source, does anyone have any recommendations? 32 bit minimum. I was looking at the plas...
6 comments posted 19yrs
posted by dash
6 comments posted 19yrs posted by dash

Use of XMD in EDK7.1i

Hi, I have an ML403 board with EDK7.1i. When I try to connect with XMD to a ppc405 based design running at 300 MHz then...
0 comments posted 19yrs
posted by jfhasson
0 comments posted 19yrs posted by jfhasson