Lattice ispMACH4000 eval boards

Problem with CPLDs is that not many people want development boards other than possibly students. Generally I think people think of these devices as "simple" so go straight to their own board rather than trying a ready made platform.

Speaking as a development board manufacturer the other problem with making boards like these is that profit line would be very low. Generally people have an expectation that CPLDs are cheap and the drive is not there in most cases to justify development.

That all said we already do a CPLD module that can be used as a crude development module but not in the lower power devices you are interested in. We are looking at making this into a proper board with a power jack and regulator to allow easy stand alone powering from a brick in the wall. No timescales yet on this but we are talking a number of academic institutions to find out interest level.

John Adair Enterpo> I want to do some testing on some of the low power CPLDs and I can't

Hi Rick,

There is a site in Germany that has some boards available at low prices. The site is

The guy is quite flexible on shipping. He still might have some boards ready from the shelf.

Good luck,

Luc

John:

Lattice has a CPLD evaluation board available for the MachXO device. It is a low cost board, and one of their most popular evaluation board. The kit includes the MachXO256 in TQFP100 packaging, power supply and parallel download cable. All of the device I/O are avaible for use, plus there is a small (too small) prototype area. The I/O levels to each I/O bank in the device are selectable (via SMT resistor), sleep mode is available on the DIP switch, there are 8 LEDs and the board includes mounting footprints for expansion headers. It's priced at a reasonable $99.00. You might want to check it out:

John Adair wrote:

Thanks for the info, but I have already looked at the XO and it breaks

10 mA before you even start clocking it. I can't put it in sleep mode because it has to run all the time. This is a very odd design. It has two sections, one is multiplexing a pair of SPI ports and four discrete signals over three pins using a clock, sync and data IO. The clock is about 10 times faster than the SPI rate, so the distortion introduced should not be excessive. This section must run at all times.

The other section receives one SPI port input to control 8 latching relays. I can add an RC circuit to control the timing of the relay pulse, otherwise the only clock is the SPI clock which will be very infrequent.

I estimate that the total power for these two circuit can be kept to just a couple of mA. The input power is from a wide range battery input and efficiency is a concern. So I am thinking of using the CPLD itself to control a switched capacitor voltage divider which will cut the voltage in half or in third to make the circuit more efficient over the battery input range. So burning another 10 mA just to start the CPLD is not a good idea.

The Coolrunner is really a good choice for this circuit with its low power and 5 volt tolerance. I wanted to evaluate the Lattice MACH4000 parts since they claim really low power. But if they don't even have a

*real* eval board, I don't know what to say!