please tell me how to learn testbench?

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LOL

Reply to
David Ashley

Start here:

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-a

Reply to
Andy Peters

lzh08 schrieb:

A testbench is what how you decide to test. You are the designer of your circuit and you know what has to be done to test it. How do you achieve it depends on your ideas and the needs of you special circuit.

Sometimes a testbench looks like another circuit and is indeed synthesizable! Sometimes it is clever to use functions / procedures to generate the stimuli. Sometimes it is elegant to generate the stimuli outside of your HDL environment (you may use whatever tool you are familiar (I use ANSI C)), generate text files and read these files into your testbench.

So a testbench is something that simulates the real environment for your circuit more or less accurate (better more ;-)) and what could happen to your circuit there. YOU have to think about what could happen!

Ralf

Reply to
Ralf Hildebrandt

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