Field-Programmable Gate Arrays

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Xilinx, MIG, UCF: timing constraints for DDR2 DRAM

Hi FPGA Group! I'm struggling to get a fast speed (~ 200 MHz) for the DDR2 DRAM interface, generated with the Xilinx Me...
3 comments posted 19yrs
posted by sheinzle
3 comments posted 19yrs posted by sheinzle

2 FPGAs /w programming FLASH in one JTAG chain

Hi there, currently I am designing an FPGA board, featuring two Xilinx Virtex-4 FPGAs. It should be possible to program...
6 comments posted 19yrs
posted by mistertorpedo
6 comments posted 19yrs posted by mistertorpedo

FPGA Configuration

Hello VLSI Engineers. Its is true that FPGA boots its program from an external PROM. How external eproms are connected t...
11 comments posted 19yrs
posted by clickonjaseel
11 comments posted 19yrs posted by clickonjaseel

HPCNCS-08 Call for papers

The 2008 International Conference on High Performance Computing, Networking and Communication Systems (HPCNCS-08) (webs...
0 comments posted 19yrs
posted by jeedward
0 comments posted 19yrs posted by jeedward

total equivalent gate count

Hello all, The ISE map report gives out a figure under the heading total equivalent gate count... So can anybody help m...
1 comments posted 19yrs
posted by nagarajputti
1 comments posted 19yrs posted by nagarajputti

Selecting I/O pins

Hi, I was recently asked in an interview that what points you will consider while selecting the I/O pins in FPGA ? One...
2 comments posted 19yrs
posted by vedpsingh
2 comments posted 19yrs posted by vedpsingh

Bitfile checking

Assuming a scenario that I have a bit file built for a particular FPGA, but i don't have a that FPGA device to download...
6 comments posted 19yrs
posted by hpsham
6 comments posted 19yrs posted by hpsham

How to use an internal signal in a testbench...

I am simulating an EDK system and want to use some internal signals at the testbench level (without routing them up to...
3 comments posted 19yrs
posted by mottoblatto
3 comments posted 19yrs posted by mottoblatto

Re: Xilinx Isolate circuitry

> Hi all, > > In our design, we have a sensitive circuitry that we think may be affected > by the bulk of the circuit (...
3 comments posted 19yrs
posted by davidmspencer
3 comments posted 19yrs posted by davidmspencer

XMD with CableServer OR remote EDK solution

Hi, Is it possible to run XMD remotely using CableServer? This is the only missing item that would enable me to work co...
4 comments posted 19yrs
posted by prdubois
4 comments posted 19yrs posted by prdubois