Latest threads in Field-Programmable Gate Arrays

Microblaze 7.0 on V2pro?

Hello all, Is MicroBlaze 7.0 compatible with Virtex-II Pro devices? XPS 9.2.02 doesn't seem to offer it as an option, b...

8 18yrs

pgp

8 18yrs pgp

Rom Implementation in a CPLD

Hallo, reading XST user guide it seems that it's not possbile to implement a rom into a cpld, so I have made some exper...

3 18yrs

marcotoschi

3 18yrs marcotoschi

Cyclone flash configuration data

I've implemented a flash programmer for the EPCS1 serial flash, attached to a Cyclone, using the Serial Flash Loader en...

4 18yrs

fb

4 18yrs fb

signal generation in VHDL on FPGA.... Check my code please

hi, i have writen a pice of code which should impliment a value on the LEDs of my FPGA development board as the signal '...

5 18yrs

rossalbi

5 18yrs rossalbi

i need fpga board with 10 Gig interface and pcie interface

hi all, for my application i need a fpga board which has PCI express interface and 10 Gig ethernet or fibre channel int...

4 18yrs

rabbiaqamar

4 18yrs rabbiaqamar

i need ur help

i want information about fpga boards. for my application i required a fpga board with pcie interface and 10 Giga bit /s...

1 18yrs

rabbiaqamar

1 18yrs rabbiaqamar

Erratic Behavior of Virtex 4 FPGA

Hi all, I am using Virtex 4 FPGA (XC4VFX100) in our application. In this, we find some erratic behaiour of FPGA. Whenev...

3 18yrs

vicchemical

3 18yrs vicchemical

Virtex-4 input pad failures

Out of a lot of 12 boards we've had two now that have experienced input pad failures (shorts to VCCO). These are LVDCI_...

8 18yrs

rob

8 18yrs rob

CFP: DTVCS 2008 - Design, Testing and Formal Verification Techniques for Integrated Circuits and Systems

Apologies for any multiple copies received. We would appreciate it if you could distribute the following call for paper...

0 18yrs

ss.dtvcs

0 18yrs ss.dtvcs

Virtex-5 User Guide "Lite"

If you want to get a feel for what you can do with Virtex-5, click on http://www.pldesignline.com/howto/206503253;jsess...

2 18yrs

peter

2 18yrs peter

Is a FPGA the solution ?

I would like to know if a FPGA is suited for this application: sound sources localization and separation. The algorithm...

4 18yrs

Louis-Charles.Caron

4 18yrs Louis-Charles.Caron

OT. Posting with Outlook Express?

Hi All, I just found this, and thought it might be of interest. Seems to work quite well. http://home.in.tum.de/~jain/so...

0 18yrs

symon_brewer

0 18yrs symon_brewer

State machine outputs and tri-state

[I posted this to comp.lang.vhdl, but maybe you FPGA experts know the answer.] Hi I'm not a VHDL expert, just learning,...

8 18yrs

grumpsnothere

8 18yrs grumpsnothere

HELP on PLL and DCM

Hi, anyone can tell me the differences between PLL and DCM in Virtex5 in terms of pros and cons? thank you.

2 18yrs

adam0818

2 18yrs adam0818

Xilinx GTP_DUAL: wizard or code ?

I am using for the first time a Xilinx RocketIO module (I have years of FPGA experience though); normally I prefer to e...

1 18yrs

tullio.grassi

1 18yrs tullio.grassi

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