Virtex-4 input pad failures

Hi Rob, I also doubt that the overshoot is to blame, and your caution is appropriate. Here's some questions, I apologise if some of them are teaching you to suck eggs!

How do you know the I/P pad failure is short to VCCO? Did each board failed the same single FPGA pin? You've got a ground plane, right? What's the rise time of the signals? Did replacing the FPGA on the board fix the problem? How did your mate measure the overshoot? (I.e. can he work a high speed 'scope properly?) Does he wear an earth strap or nylon pants when probing? (Ahem!) Any 12V traces nearby on the board that a probe can short to these signal lines? Have you tried simulating with Hyperlynx or somesuch? Did you ask Xilinx to take a look at the broken parts? Are the two failures from the same batch? Are you sure the 2.5V power supply can't overvoltage?

HTH. and good luck, Syms.

Hi Rob, Like Symon had quoted you have to provide more information, like:

- Are the affected pins nearby to 2.5V pins or traces? I have seen board short circuit that happens only after assembly process due to thermal or mechanical stress.

- Are you sure it is not related to board assembling process?

- Did you extracted the Phy or FPGA to know which device is causing the short to 2.5V?

- If the short doesn't happen in the moment the board is energyzed how long it takes to happen? Does the board/device increase in temperature before it happens?

- Freezing the board changes the behavior?

- Only when all possible board related causes can be discarded then the stress could be reason and only then the talk about overshoot or silicon behavior should arise.

Good luck,

-Augusto

Hi Syms -

Great questions. I have only second-hand information from the board designer, but some answers below.

Ohmmeter, probing from Phy pins. Impossible to isolate the short with both parts still mounted. So there's an assumption that the FPGA input was more likely to fail than the Phy output, and that the short is not on the PCB itself. Both boards worked normally for some period of time (weeks) before the failures occurred.

Yes. If you buy the overshoot theory then you can hypothesize that there is something about that trace (for example length) that exacerbates the overshoot. If you don't buy the overshoot theory then it seems quite a coincidence that the same pin failed on both boards.

Yes, several. It's a 12-layer board.

Don't know, but it's 125MHz DDR, so must be in the 1ns or less neighborhood.

Hasn't happened yet.

He knows what he's doing, but no high-speed scope, and he did not put a lot of effort into the analysis (locked onto the overshoot theory). Plus he can only probe at the Phy, which is the opposite end of the trace from the FPGA. With a fast driver and a 2" unterminated trace there will certainly be some nice overshoot, but may not be 500mV.

Hell if I know!

Nope.

It's available, but no.

Suggested it, but no.

Not certain but highly likely.

Unlikely. It's a TI switcher with soft start. 2.5V regulated off 3.3V. 3.3V regulated off 9V.

Thanks for taking the time to respond!

Rob

Hi Augusto -

Can't rule out board/assembly issues, but both boards did work for a period of weeks (not constant use). No parts were removed to isolate the short. The short was "assumed" to be in the FPGA pad. Not very thorough, but this project is crunched for time and budget. Poor excuse, but reality. And I have limited control. Neither of these boards was run in the temperature chamber.

Thanks for the thoughtful questions. I'll post back if we get this definitively resolved.

Rob

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You say your input is LVDCI_25 and unterminated. To me, this is conflicting information. Isn't the LVDCI_25 explicitly internally terminated by the DCI termination scheme applied to that pad? I know what DCI is capable of but despite being "ready" for DCI in a design or two, I've never used it so I don't have the practical experience of configuring those input terminations.

Another question for the system if the DCI input termination is present: how much drive is required by the PHY and is it happy to deliver that power?

It's certainly a quandry.

- John_H

You have to look at the amount of energy that can be contained in only

2" of trace. Calculate the worst case inductance and current you can get flowing in such a trace, and see if it can develop a damaging amount of energy. I have REAL doubts that is your problem.

Jon

and not just the energy - that +500mV limit is not a damage rating, it is where the clamp diode will start to think about conducting. These devices are rated at 3.3V + overshoot, so the levels to damage oxides, or even clamp diodes, will need a LOT of energy Something else is going on.

Have you checked the removed devices, to verify the failures ?

-jg

John -

The LVDCI_25 inputs are normal unterminated LVCMOS inputs. It's the outputs that have internal DCI series termination.

Rob