Hi all,
I am using Virtex 4 FPGA (XC4VFX100) in our application. In this, we find some erratic behaiour of FPGA.
Whenever the bit file is loaded into the FPGA, there is a drop in core voltage(power module getting shutdown).Bit file gives such random behaviour uses particular three banks for its logic. Here we thought like this, it may be due to any internal damage in FPGA IOBs around that three banks.
Here is the few points added,
- We tried with a bit file that has high logic utilization (logic is not on that faulty banks. it uses other banks). It works fine.
- Also we tried some other bit files with low logic utilization using that banks is working properly (power won't disturbed).
- Whatever signals from that faulty banks are not shorted with VCC/ GND. We probed it.
- Good core voltage power solution.
Pls suggest me the solution to identify the exact source of that behaviour.
Regards, Vijayan