Erratic Behavior of Virtex 4 FPGA

Hi all,

I am using Virtex 4 FPGA (XC4VFX100) in our application. In this, we find some erratic behaiour of FPGA.

Whenever the bit file is loaded into the FPGA, there is a drop in core voltage(power module getting shutdown).Bit file gives such random behaviour uses particular three banks for its logic. Here we thought like this, it may be due to any internal damage in FPGA IOBs around that three banks.

Here is the few points added,

  • We tried with a bit file that has high logic utilization (logic is not on that faulty banks. it uses other banks). It works fine.
  • Also we tried some other bit files with low logic utilization using that banks is working properly (power won't disturbed).
  • Whatever signals from that faulty banks are not shorted with VCC/ GND. We probed it.
  • Good core voltage power solution.

Pls suggest me the solution to identify the exact source of that behaviour.

Regards, Vijayan

Reply to
Vijayan
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Vijayan, I think that there is roughly a 10~20 % rise in current during configuration process,

1- What is the current being drawn from source during the configuration process in both working and failing bitstreams and is the voltage regulator capable of providing enough power and provide good voltage regulation under transients? 2- Have you seen X-ray inspection of BGA of short circuiting in those specific banks ?

Just random thoughts, Hope some one with more experience would come up with better ideas.

/MH

Reply to
mh

Does the core vltg drop during configuration or after (or both) ?

Reply to
Grumps

Have you checked that the I/O on the faulty banks is not in contention ie pins driving against each other. I know you say there are no shorts to VCC/GND but could there be I/O shorts on the faulty banks ?

Good luck

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Dunstan

ByteSnap Design Ltd,
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Dunstan Power

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