Timing constraint on DCM input ignored after update ISE 8.1 -> 8.2?

Hi!

I have two desings here, both use the same generic processor interface which includes a DLL. The input pin for the DLL is constrained in the ucf-File:

NET "pciclk" TNM_NET = "clk"; TIMESPEC "TS_clk" = PERIOD "clk" 30.3 ns HIGH 50 %;

With ISE 8.1.02i this worked fine, the result looked something like this:

-------------------------------------------------------------------- TS_clk = PERIOD TIMEGRP "clk"| 30.300ns | 5.199ns | 1 | 25.101ns | 0

30.3 ns HIGH 50% | | | | |

--------------------------------------------------------------------

Now I upgraded to ISE 8.2.03i and the constraint is ignored:

-------------------------------------------------------------------- TS_clk = PERIOD TIMEGRP "clk"| N/A | N/A | N/A | N/A | N/A

30.3 ns HIGH 50% | | | | |

--------------------------------------------------------------------

No changes in the design were made. It is used on a Spartan3 and runs well in spite of the ignored constraint.

I've found, read and (I think) understood

but I don't get the stated error and I think I meet the conditions: "clk" is only used in these two lines in the ucf "pciclk" is only used here and in BEFORE/AFTER constraints.

I also found /Xilinx/doc/usenglish/books/docs/cgd/cgd.pdf but as I didn't understand it very well and what I did didn't tell me anything new.

Any hints what goes wrong here?

- Philip