synthesizing vqm with parameters with quartus 7.1sp1

Hi,

I have a verilog module in my project, which is instantiated in the design 3 times, each time with different parameters. I generated 3 different vqm files outside the Quartus project (with Synplify), one for each instantiation. How can I tell Quartus which vqm file should be linked to its appropriate block?

With regards, Hezi