I am moving onto Verilog now from VHDL due to it being too complicated for me to start off with and not having any calsses available to go to in order to teach me it. So far Ive been just trying to make a simple counter that would pulse an led every second, and so far no luck. Im getting errors left and right, when I change one thing, I get another error, and when I fix that I seem to get others. I have no idea what Im doing wrong, everyhting looks like it would run fine from what Ive read. So if you can let me know what my errors are. Thank you!
CODE:
module pulse(led_o, clk50);
input clk50; output led_o; reg [15:0] c;
always @(posedge clk50) //Trigger on 50MHz clock begin if (c == 50000000) //Convert 50MHz Clock to 1Hz