Is anyone of you familiar with the Xilinx Application Note XAPP134? (downloadable at, ftp://ftp.xilinx.com/pub/applications/xapp/xapp134_vhdl.zip)
My questions are:
- From the system, you can control the SDRAM with commands that are defined through data_addr_n, we_rn and AD[29:28]. When I set one command, does it have to be set back to zero afterwards and when? E.g. when I write, I first set the addr_wr command and the address, then the data_wr command and the data, but afterwards, do I have to set everything (including the AD-bus) back to zero? (because, also zeros stand for a command).
- I am wondering what I have to do at the very beginning: At first, I put a reset, and it takes some time until I can perform any action. Then I precharge and load the controller mode register (this has to be done before anything else can be done, right?) But then....? Do I have to load the SDRAM mode register before I can read/write/auto refresh/...
- And did I understand right, that I still have to do the refresh by hand, so every 64ms? By issueing the command AUTO REFRESH? Or does the controller already do this for me?
- But now, finally the last question: In the future, I need a 16-bit-wide-data-bus-design for a 32mb module instead of the 32-bit-design that is given here. The data destination should then be masked by the DQMs. How can I easily convert this?
Thank you VERY MUCH! :-)