I am trying to follow the Xilinx "Introduction to Programmable Logic". I try to implement in FPGA. But when I try to assign I/O pin in PACE's DOL. I found I can not assign Loc=P36. The drop-down list does not has the entry. I am using Webpack6.2i for Spartan 3.
Why?
Might be a power pin. Or a GCLK. Usually PACE is better spotting hardware issues than we are. What is your part number?
for Loc drop-down box, there sre T,L,R,TL,TR,BL,BR,RT,RB,LT,LB. What they mean?
T = top L = left R = right TL = top left TR = top right BL = bottom left ...
you get the idea.
--
Rick "rickman" Collins
snipped-for-privacy@XYarius.com Ignore the reply address. To email me use the above address with the XY removed.
Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL
Have something to add? Share your thoughts — no account required.
Ask the community — no account required