PACE error

Hi , I hope somebody else has had the same problem....

I am currenlty migrating some software from an XC3400-4PQ208 to a SPARTAN-3 XC3400-4TQ144. The software and everything is running perfectly in the previous spartan. I have created a new project for the TQ144 and synthesised it without any error. However, when I run the PACE software to assign the pins, the Design Rule Check gives me lots of errors with the same legend "The bank number specified does not exist", It is worth to note that I am not assigning the bank, I am assigning a pin and PACE selects the Bank by itself. The bank for each case is correct though, I have double checked the data sheets and the pins are currently assigned to a correct bank. If I dont pay attention to this errors and try to generate the programming file , the bitgen generates an error without reason. I have tried to disselect the option of "Run Design Rules Checker" under the general options for generate programming files. Then, the bitgen doesn't give any error but I am afraid this is causing my FPGA to be incorrectly programmed since no input/outputs are working... do you have any idea what can i do in this case?

My Project Navigator and PACE's versions are 6.01.3i... thank you

Sergio

Reply to
Sergio
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Hi Sergio!

I have the same problem using a 50k Spartan3 in TQ144 package. You can just assign the pins in the UCF file manually. Afterwards you can run PACE to generate area constraints and so on, PACE only mixes the line order in the UCF file. If you run a design-rule check it still compains about the bank. At least I have not found any problem regarding the functionallity of the FPGA, so dont worryi:-).

Best regards,

Christoph

Reply to
Christoph Brinkhaus

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