problem testing the serial interface code from fpga4fun

Mar 22, 2008 1 Replies

I am testing the async_transmission module in xilinx webpack. But I couldn't see the waveform demonstrated in the tutorial for 0x01010101. TxD is always 'x' in my behavioral simulation, what's wrong? It seems as if the transmission module never sees the TxD_start turns high.



Attached is the source code for the async_transmission and my test module.



Thanks,



`timescale 1ns / 1ps `define DEBUG // in DEBUG mode, we output one bit per clock cycle



module serial_tx(clk, TxD_start, TxD_data, TxD, TxD_busy); input clk, TxD_start; input [7:0] TxD_data; output TxD, TxD_busy;



parameter ClkFrequency = 25000000; // 25MHz parameter Baud = 115200; parameter RegisterInputData = 1; // in RegisterInputData mode, the input doesn't have to stay valid while the character is been transmitted



// Baud generator parameter BaudGeneratorAccWidth = 16; reg [BaudGeneratorAccWidth:0] BaudGeneratorAcc; `ifdef DEBUG wire [BaudGeneratorAccWidth:0] BaudGeneratorInc = 17'h10000; `else wire [BaudGeneratorAccWidth:0] BaudGeneratorInc = ((Baud5))/ (ClkFrequency>>4); `endif



wire BaudTick = BaudGeneratorAcc[BaudGeneratorAccWidth]; wire TxD_busy; always @(posedge clk) if(TxD_busy) BaudGeneratorAcc


After a lot of debugging, it seems the incremental variable BaudGeneratorInc calculation is not working with ise webpack. The following formula is simpler to understand and yields correct result: wire [BaudGeneratorAccWidth:0] BaudGeneratorInc = (1

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