Hi.
I design a xilinx virtex2pro with pci-x interface that is connected to a server PC. I am using the PCI interrupt. Whenever an interrupt is completed the my fpga drive it to 'Z' and the pullup on the mother board pulls it to '1'.
The problem is that the pullup is very slow (300 ns) and the host interrupt service routine is accessed again for nothing.
I am using IOB type PCIX.
Am I doing something wrong ?
ThankX, Nahum
This is normal and to be expected.
One approach to dealing with this is to drive the interrupt high for one clock before going Hi-Z. Note that this isn't per the pci spec which says open-drain, using an IOB with low current capability should avoid problems when the interrupt line is shared with another device which is driving low.
"System Alchemist" wrote
Or drive it Hi as you are floating it.
As someone who has worked on a lot of device drivers I can't say I've ever seen a card that consistently produces double interrupts. I haven't gone and measured INTx rise times either.
The result seems plausible, though. Figure an ~8.2k pullup (that's Rtyp for pullups in the PCI 2.1 spec, don't have X handy), 3 slots (at about
5p each) each with a card (allowed 10p each) gives you 45p*8.2k is ~350ns. OTOH, I've never seen a motherboard that was high-end enough to have PCI-X 66 that didn't also use an IO APIC that allowed each INTx pin to be routed individually, though.
I remember that PCI's level sensitive interrupts are supposed to be an advantage over ISA's edge triggered interrupts. It might be that someone figured that once the interrupt register was reset it would take long enough to process that more than 300ns would have passed. As machines get faster, that isn't true anymore.
-- glen
Have something to add? Share your thoughts — no account required.
Ask the community — no account required