hello all,
For a hobbyist purpose, I want to drive an LCD display (320x240) with a CPLD or FPGA in a standalone device (weather station). I've already played with FPGA and VHDL for some projects but I was never involved in the hardware part of such projects.
The CPLD would have to read data (bitmap picture) from a dual port RAM and write it to the 4 bit data input of the LCD controller (+control lines, clock...). On the other side of the RAM, a microcontroller will update sometimes the content of the picture to be displayed.
I would like to know how to estimate the number of gate needed for the project in order to buy the cheapest CPLD that fits the number of gate.
Do I need first to design the VHDL part and synthetize to know the number of gate and then choose the CPLD?
I do not really understand the difference between CPLD and FPGA and what is better for me.
For a CPLD, the configuration is non volatile and in the FPGA it is volatile so a reconfiguration is needed on each start (via configuration EEPROM or JTAG programming) but the FPGA is much more powerfull. Correct?
Is a CPLD enough for my project? I'm turning around Xilinx XC9536 which seems to be very often used nowadays, is it a good choice for this project?
Many thanks by advance.