PCI interface with attached PLD

I need to build a PCI interface - could be 64 bytes of write-only latches and 1 byte of status readback.

Then I want to implement the rest of my logic, not to complex, in a PLD.

I'd LIKE it all to be in one device, but I don't want to spend any time debugging PCI implementations.

Anyone got any recommendations for where to go get my IP?

David

Reply to
David Collier
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Hi,

There are any number of vendors -- both Xilinx and Altera have PCI interface IP you can purchase. If you like, you can also find some FPGAs with integrated PCI interfaces in them...

Or you can buy IP from a wide variety of IP vendors, just look at the third party vendor lists on the Xilinx or Altera websites.

You could also try using the PCI interface available on the Opencores website. And then there are always products from PLX, etc... if you don't mind using a 2-chip solution.

Is this a commercial development project, or a hobby project?

Eric

David Collier wrote:

Reply to
Eric Crabill

David Collier wrote: : I need to build a PCI interface - could be 64 bytes of write-only latches : and 1 byte of status readback.

: Then I want to implement the rest of my logic, not to complex, in a PLD.

: I'd LIKE it all to be in one device, but I don't want to spend any time : debugging PCI implementations.

: Anyone got any recommendations for where to go get my IP?

Lattice has free IP for their CPLDs.

Bye

--
Uwe Bonnes  bon@elektron.ikp.physik.tu-darmstadt.de

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Free software means: Contribute nothing, expect nothing

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Reply to
Uwe Bonnes

In message , David Collier writes

David,

You didn't say if this was a one-off or for production, though your desire for single chip suggests the latter. Hence apologies if this is inappropriate...

Swimming perhaps against the current tide, I chose the Quicklogic fusible-link devices to design a fairly complex multi channel DMA/PCI interface for my video compression products. Thanks mainly to the (free) simulation tools provided, it all worked first time. Compared to that, your PCI target requirements sound pretty straightforward. Note that I'm certainly no FPGA specialist, although I did have prior PCI experience.

Pro: True single chip design, can't be copied, comparatively easy to use tools, hard PCI core guarantees PCI timings which you can't mess up, can get pre-programmed/labelled straight from factory (in quantity but not ridiculous).

Con: being fuse-link, you only get one go at it. Arguably this is a Good Thing because it disciplines you to do it right first time, OTOH your application may mandate the flexibility to change it after assembly. There's none of the "smarts" you tend to get on current mainstream chips. You may need to buy a programmer, although you can get some programmed samples from them via the web. Not really for hobby or one-off jobs, unless you're already a user.

[Just a very satisfied customer.]
--
Alan Hall                 PC and Embedded Systems Design
Databuzz, Ipswich, UK     Digital Video Specialist
Tel: +44 1473 652301      "Tsunami" Wavelet Compression Products
Reply to
Alan Hall

I think that you should check out the QL5030 from QuickLogic. The device has a fixed PCI target interface with a OTP programmable FPGA fabric. There is no fee for the PCI core and full featured PCI testbench is provided for simulation. The advantage of this is it would provide you with a single part solution for you PCI and the rest of your logic.

Reply to
Chuck Levin

Chuck Levin wrote: : I think that you should check out the QL5030 from QuickLogic. The device has : a fixed PCI target interface with a OTP programmable FPGA fabric. There is : no fee for the PCI core and full featured PCI testbench is provided for : simulation. The advantage of this is it would provide you with a single part : solution for you PCI and the rest of your logic.

At the cost of a defect chip for every programming error.

Be sure what you do.

If cost are a issue, consider the Opencore PCI core.

Bye

--
Uwe Bonnes  bon@elektron.ikp.physik.tu-darmstadt.de

=======================================================

Free software means: Contribute nothing, expect nothing

=======================================================
Reply to
Uwe Bonnes

Chuck Levin wrote: : Actually there is no cost for defect errors since they have a WebAsic : program that allows you to get programmed samples for free.

... : > At the cost of a defect chip for every programming error. : >

: > Be sure what you do. : >

: > If cost are a issue, consider the Opencore PCI core. : >

So there is either the cost for a socket or a need to unsolder the chip witheach programming error. Also for each webasic you have to wait some time for delivery, not good for a normal delivery flow with program, run, fail, debug and reprogramm.

Bye

--
Uwe Bonnes  bon@elektron.ikp.physik.tu-darmstadt.de

=======================================================

Free software means: Contribute nothing, expect nothing

=======================================================
Reply to
Uwe Bonnes

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Reply to
Chuck Levin

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Reply to
Chuck Levin

David,

I'm just finishing off an Altera Cyclone based PCI core/board combination.

The FPGA based cores I've seen require some PCI interface understanding, mine has been designed to be as simple to use as possible, 'Easy PCI' if you like.

The core is currently target only, takes minimal area (depending on the number of memory areas you need but can be as low as

400 LUTs) and routes easily.

I'm waiting for the board house to get back to me so I can set prices for the board, the core will be low cost compared to anything else apart from the opencores core, but you would have to implement this and debug hardware etc.

I'll sell the core, the board, the board and the core or can develop custom hardware based round the two. This is similar to your (Dexdyne's) 'zipper' idea. The PCI section of the board is designed and debugged, custom hardware/logic design can be quickly added. This could include a NIOS core is needs be.

Further details can be found here..

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The expansion connectors and mounting holes allow a daughter board to be mounted for prototyping etc. These can be easily removed to allow custom hardware to be implemented.

I hope this is of interest.

Nial Stewart

------------------------------------------------ Nial Stewart Developments Ltd FPGA and High Speed Digital Design

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Reply to
Nial Stewart

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