I have a implemented a PCI 66Mhz master/target design on an Fpga, using an IP core from one of the well known suppliers. The core does not support PCI-X.
The card works fine in 33Mhz and 66Mhz PCI slots. However, it sometimes fails to be seen by the PC when inserted in a PCI-X slot.
I drive the PCIXCAP and M66EN pins on the card from the Fpga to signal that the card supports 66Mhz PCI but not PCI-X.
Here's my question.
On power-up, a PCI-X slot expects the card to wake up within 100ms, whereas a PCI slot allows 2^25 clock ticks which is about 500ms. By the time my Fpga wakes up (exits power-on reset and is configured) I'm thinking that I might have missed the 100ms reset window? If I miss that window, and the Fpga hasn't driven PCIXCAP to signal that the card doesn't support PCI-X, then the PC won't see the card. Is that correct?
Now here's the complicated (to me) bit. If I power-cycle the PC, then "sometimes" the card will be recognised. What I'm thinking is that perhaps when the card wakes up after the 100ms window, the PC thinks a66Mhz PCI card has been hot-plugged, and on power-down it stores that information such that when the PC is switched back on it expects that the PCI-X bus will have a conventional PCI card on it and therefore it uses a 2^25 clock reset window.
Am I on the right track here at all?
I'm going to tie-off PCIXCAP on the board, rather than driving it from the Fpga, and the same for M66EN.
I'm just wondering why the card sometimes works and sometimes doesn't.
All intelligent comments welcomed.