Hi I wanted some help or pointers in Asynchronous LIFO design. My read and write clocks are asynchronous, I don't know how to take care of this nature of clock in a LIFO design.
I know how to implement a stack if the read and write are in the same clock domain, but not when the clocks are different.
Any suggestion or pointers will be helpful.
rgds bijoy
Hi,
bijoy schrieb:
write clocks are asynchronous, I don't know how to take care of this nature of clock in a LIFO design.
domain, but not when the clocks are different.
A general asynchronous LIFO seems impossible to me. You need to have some constraints to enable a LIFO to be asynchron read and write, as all operations occure on the the same register. This means you should transfer your LIFO in one clock domain aand manage the domain crossing outside the LIFO.
Many vendors provide you a build in FIFO or at least a soft core for a asynchronous FIFO. Why not using this FIFO to cross the clock domains and build a synchon LIFO.
bye Thomas
write clocks are asynchronous, I don't know how to take care of this natur of clock in a LIFO design.
clock domain, but not when the clocks are different.
As previously stated, you will have to deal with clock domain crossin issues if you want a reliable design. I would have the memory and counte in the the Read/Pop-side domain, and buffer the Write/Push commands t reduce metastability effects. This will add latency to the Writ operations, which may cause a problem if Write/Push and Read/Pop command happen close together. If there is no handshaking for the Read/Po commands then at some point you will almost certainly get the wron data...
How 'Asynchronous' is the system? Timing anlaysis, and timing-drive synthesis may be problematical.
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