Why no depletion mode LDOs?

Wild guess: it would take too much silicon area. Idss of a Supertex depletion fet is tiny compared to how much current you can get through a similar-size pfet or pnp.

There's no reason a pnp-type LDO can't be stable for almost any load; people don't seem to want to do it.

Most systems have some higher voltage around. So an LDO could have a source follower topology with an extra input for the gate drive. I've built my own LDOs that way.

True ... but when you look at small device like this one they aren't all that bad:

Manufacturers aren't willing, that's the problem. When I roll my own regulators they are stable.

Usually I have only one voltage coming in and have to make anything else from that. Not a big deal to create a voltage above the input rail but it'll always cost a few diodes and caps, meaning valuable space.

is

even with one voltage coming in it isn't unusual that you need a few closely spaced low voltages for say a an FPGA or cpu core and IO so you can have a switcher for the highest and LDOs for the rest and use the board input for the gate drive

-Lasse

is

Most of the time I do not use FPGA or any programmable has just one supply. But there are situations where there simply is not enough space for a switcher.

common-source is

I know, but you can get some really small switchers, we use some adp2107

-Lasse

is

That's not bad, but it's essentially ohmic below 1 volt d-s, so loop gain will drop like a rock in real LDO mode. And I don't know how well a thing like this would integrate.

What's that one cost? I just designed in some Supertex DN2530's, a pretty similar part in sot-89. About 60 cents at 1K.

Yup. It ain't rocket science.

stuff

is

Here's a home-brew dual LDO, driving some FPGA stuff.

I gave up a little transient regulation for stability, since my load is fairly constant. The funny looking TPs in the drains are actually PCB trace current shunts, so I can measure load currents.

This board has 11 power rails.

hth

- Michael Wieser

Why do you have R227 and R241? They waste over 100mW each. Is it to reduce the overshoot when the load (an FPGA?) current drops to minimum?

Allan

Thanks for posting this.

Why the 10 ohm dummy loads? You're throwing away 230mA. Does it overshoot a bit with a light load?

Best regards, Spehro Pefhany

there

Ouch.

stuff

is

is

You can get them for around 40c in qties. So if you switch to that and build 20 units -> $4 saved -> one brewsky at Zeitgeist :-)

That's how I build the DC part of laser drivers. But many times my loads have transients from hell or onerous torture tests per some strict standard.

Yes, they improved transient response in simulation. I was concerned that PCIe packets would whomp the load currents and wiggle the supplies, but that doesn't seem to be a big deal. I could take them out, but I'd have to write an ECO, and I hate to write ECOs. I suppose that with 1.5 volts in and 1.2 out, I shouldn't be too worried about overshoot in the up direction.

I guess a resistor in series with C247 (C250) would improve transient response too. I'll try that next time.

The board is the controller for an EUV lithography light source. The box has 68 external connectors. The first etch, rev A, works with trivial kluges and is in production. We checked it really, really hard and that paid off.

Most of the power supply is on a separate board packed with LTM8023's.

Which one? The ones I checked are of the usual PMOS architecture, like this one:

inherent

there

to

Ouch.

stuff

is

common-source is

The 44 uF of output caps help a lot in my circuit. Even 100 uF of ceramics is reasonable at low voltages and sensible temperatures. My loop could have been faster, and tuned tighter, but this was good enough.

Yuck, *writing* ECOs? Altium generates them automatically with two keystrokes, I had assumed all EDA packages did these days.

I usually put 100pF in that place and call it a day; haven't had a problem so far. A dash of series R, probably 1k would be enough here, adds a zero that can be quite handy. From there, it's only a matter of tweaking response versus "can't be arsed".

Tim

So what does Altium enter under "Reason for change" with those two key strokes?

FU