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Well, those two things make it quite useless for board level design then.

I have heard from users that they had hierarchy issues with Capture as well.

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PSpice Schematics nicely does hierarchical... Crapture doesn't ;-)

(I do large chip designs using PSpice Schematics and PSpice Simulator.) ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
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| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

The symbols are. LINE, ARC, SYMATTR and so on. However, the subcircuits are not always. Stuff you create yourself, things like optocouplers, yes. But switch-mode chips and some other stuff from Linear Technology are non-ASCII, proprietary. They also use special hooks in LTSpice that are probably guarded like the recipe for Tapatio hot sauce.

Yes, libraries are the major stumbling block and hurdle when switching CAD system. Which is why people (including me) tend to cling to what they have for a long time.

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Except that you can roll your own templates. (If you understand the INI file structure you can put back PCB's, though I've never done it... I only do chips.)

So ?:-) Some of us have no trouble whatsoever :-)

Only in simulation, sometimes. So I just choose "flat" when simulating... then outputting hierarchical netlists for the layout guys.

They didn't want to go to India where Crapture is "maintained".

Indeed! ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

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You mean writing your own netlisters? Nah. Got enough projects as it is right now. Oak pieces still need to be cut, trimming some bushes, more plumbing work. And, oh, support a chip design :-)

[...]

Flat sheet structure is the pits on large designs.

[...]

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No problems with it, as long as you only use simple hierarchies. Of course, simple hierarchies aren't useful...

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Learn to understand what a template is ;-)

Learn also to read... hierarchical to the layout guy.

In simulation you can't tell flat from hierarchical when probing nodes. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

[snip]

I just realized what you said there. You're confusing hierarchical schematics versus hierarchical netlists.

I _draw_ hierarchically. I can netlist flat OR hierarchical. I have noted _occasional_ events where a multiple appearances of the same _block_ in a system can confuse the PSpice simulator when hierarchically netlisted.

Charlie is aware of those _strange_ events, because I jumped on him about it :-)

Solved by _netlisting_ flat, for the simulator only.

I suddenly see a solution, though I'll not tell :-)

...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

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But Charlie said no netlist, and that's serious. Not sure how a template would help.

A template is them thar thang you draws so yer gitten the cut-out fer a swamp cooler right so it fit :-)

I want them, too, and I am not the layouter :-)

I can, because it's way easier to read as a reviewer. I sure am glad that the IC design house I work with right now does provide hierarchical schematics. That's how I like projects to get started and keep going, from the top architecture downwards. Not a pile of sheets.

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[...]

Orcad-SDT was so much better. We did a complete ultrasound machine with it. Top sheet, just a few block like "box", monitor, keyboard and such. Next layer all the modules, over a dozen. 3rd layer down the circuitry in each module. 4th layer for repeating channel blocks. First time I tried something like that with a Windows version ... KABLOUIE .. beeep.

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Where did Charlie say, "No netlist"?

In a netlister it defines how each part TYPE netlists, like a bipolar...

Qxxx %c %b %e [%s if integrated] modelname area

Capish ?:-)

Still confusing hierarchical schematics and hierarchical netlists ?:-)

But you still have a "pile of sheets", you can just push/pop in and out of blocks... each block is (usually) just one sheet.

You need to stop by sometime and I'll stun you with a real schematic capture, as in...

Each of those blocks has _many_ transistors, some of those blocks have sub-blocks. I can push/pop thru all those levels from the schematic capture. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

What do you want? As long as there are no blocks with multiple instances, OrCAD's hierarchy works. ;-)

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17 lines above your question. Quote "No PCB netlist outputs".

Well, we board level guys need netlist in all sorts of formats, depending on the CAD the layout is using. For me that's usually PADS, but not always. So my CAD can generate a ton of different ones.

It's "capisce", man, capisce? :-)

I don't care about the netlist as long as the layouter's CAD eats it. We circuit board designers have multiple instantiations of repetitive circuitry all pounded out and refdes'd in there. I know you's guys do it differently at times. To us only the schematic matters.

I wish I'd be there soon again but we selected another vendor, in CA.

Kiwi Semiconductor? Are you fixin' to make that jump across the ocean?

That's how Orcad-SDT used to work. But not in a pile of sheets. One was on top, then 5-10 below that, then ...

And yeah, I could mouse-click into sub-sheets as well. In the Windows versions, too, except that it sometimes resulted in "A fatal error has occurred".

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Thou shalt only have one channel, and not marvel at other channels besides it, or the wrath of the computation machine will come upon thee :-)

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And I answered, "... INI file..."

I can connect to ANYTHING that uses a netlist for verification.

Who me ?:-)

That's the way PSpice Schematics works, one top-level, then plunge in. But if you print out you get multiple pages... unless you do Adobe Acrobat hierarchical... as I do for design reviews ;-)

Not here. ...Jim Thompson

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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)

well.

It sounds like he needs an 'Etch-A-Sketch' ;-)

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Hi Jim, Jeorg, What I meant was, there is no 'canned' PCB netlist format produced by Schematics. They were all intentionally removed after about 9.2 to prevent competiton with Capture. At one time, there was a switch you could set in the .INI file that turned them back on, but that was removed in later version.

What Jim is saying, is that the exiting netlister has a changeable formatter. On each symbol there is a 'TEMPLATE' attribute that determines what information, in what order, will be added to the netlist. This allows guys like Jim to have multiple formats for the output, so he can output a spice compatible netlist, a Dracula compatible netlist, or even a simpler netlist. It would not be a problem at all to create a PCB type netlist using this. It would basicly require you to know the format for the PCB program you want to go to, and you would need to add the necessary footprint attribute to the parts you are using.

Charlie

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For the usefulness of a schematic capture for real board level work that is the equivalent of an engine removal. It becomes rather useless.

Yeah, I was always wondering how Jim wants to generate a PADS netlist with an INI file :-)

Ok, IOW I'd end up having to write a netlister. Just what I thought, Nah, I'd rather not, I'll stick with the CAD I have then :-)

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I even have a template now that calculates active chip area ;-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |

               I can see November from my house :-)