Simple Counter in Verilog

I am moving onto Verilog now from VHDL due to it being too complicated for me to start off with and not having any calsses available to go to in order to teach me it. So far Ive been just trying to make a simple counter that would pulse an led every second, and so far no luck. Im getting errors left and right, when I change one thing, I get another error, and when I fix that I seem to get others. I have no idea what Im doing wrong, everyhting looks like it would run fine from what Ive read. So if you can let me know what my errors are. Thank you!

CODE:

module pulse(led_o, clk50);

input clk50; output led_o; reg [15:0] c;

always @(posedge clk50) //Trigger on 50MHz clock begin if (c == 50000000) //Convert 50MHz Clock to 1Hz

Reply to
Weizbox
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me to start off with and not having any calsses available to go to in order to teach me it. So far Ive been just trying to make a simple counter that would pulse an led every second, and so far no luck. Im getting errors left and right, when I change one thing, I get another error, and when I fix that I seem to get others. I have no idea what Im doing wrong, everyhting looks like it would run fine from what Ive read. So if you can let me know what my errors are. Thank you!

Reply to
Symon

Thanks! Im really new to this and a lot of differnt sites dont make things all that clear so its hard to tell whats right and whats wrong. The sixteen bit was an oversight :-/ Thanks for the input tho.. Ill try the group as well!

Reply to
Weizbox

make that big enough to hold 50000000, at least 26 bits.

make an output register

reg led; assign led_o = led;

Offhand I think that will do what you want. With clock driven logic you can't just 'wait', you have to maintain some sort of state (in this case just whether the LED is off or on) and come back to it at a later clock edge, based on some counter or signal.

--
Ben Jackson

http://www.ben.com/
Reply to
Ben Jackson

Hi -

The synthesizer isn't going to know what to do with wait(50ms). In fact, I've never seen wait() used with a delay inside.

Here's my template for an up counter. ga_reset is the global asynchronous reset:

Reply to
Bob Perlman

I agree with this response, but I think you missed a begin-end pair. You only want to toggle the LED when the counter wraps. See below.

Cheers, Chris

always @(posedge clk50) //Trigger on 50MHz clock begin if (c == 50000000) //Convert 50MHz Clock to 1Hz module pulse(led_o, clk50);

Reply to
Chris Alexander

Agreed, although it assumes that you know the language and need a cheat-sheet. Of course, that cheat-sheet comes in handy all the time! That's why it's always on top of the monitor or someplace else nearby.

-a

Reply to
Andy Peters

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