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Creating a single logical netlist...

Here's a summary of my problem:

I have multiple ngc files, e.g.:

top.ngc support1.ngc support2.ngc support3.ngc

"top" is the top level ngc and "support1-3" are cores need to actually implement "top"

Imagine I have VHDL for "top" but not for the others.

I'd like to have a single ngc (or edif or whatever) file that describes the whole component. Is this possible? The resultant file would be needed for physical synthesis, not just simulation, so ngd2edif wouldn't do the job, even if it was still around.

Every couple of months I try to figure out a way to do this and end up giving up after wasting a good bit of time.

If someone could tell me once and for all if it's possible or not it would save me lots of pain.

Thanks,

Robin

Reply to
Robin Bruce
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Robin,

There is an "ngcbuild" tool included with the ISE software. As you might expect, this assembles the top level NGC with any sub levels (NGC or EDIF) and produces a single ngc file. Use the same options as you would for ngdbuild, including any UCF file, data directories, etc. Just type ngcbuild -h on the command line to get further details. Will this meet your needs?

thanks, david.

Rob> Here's a summary of my problem:

Reply to
David Dye

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