hi newsgroup,
in the Xilinx application note "XAPP224.pdf" it is said (chapter: Using the Received Data) :
"Some example code for this circuitry is given in the design files as mentioned below"
Did I miss a thing ? In which vhdl file the description can be found ?
Thank you for your help.
Rgds Andr=E9
On page 7 there is a link to
In top_fast.vhd rxcount is incremented by 1 or 2 and rxreg is shifted by 1 or 2 depending on dvalid.
Alan Nishioka snipped-for-privacy@nishioka.com
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