Field-Programmable Gate Arrays

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PCI-X target chip with simple backend interface....

After extensive Googling I'm unable to find a PCI-X target chip with a simple backend interface that would act as cost...
2 comments posted 21yrs
posted by andyesquire
2 comments posted 21yrs posted by andyesquire

Xilinxs XCF16 PROMS Eng. Samples Bugs?

Hi Everyone. I am using XCF16 PROM in our boards. Those chips are Eng. Samples . from some reason in some boards we can...
0 comments posted 21yrs
posted by harela
0 comments posted 21yrs posted by harela

Decoupling V2P

I am little confused with the V2P decoupling guidelines. I am using a V2p7-ff896 part. It has 32 VCCINT pins and the th...
7 comments posted 21yrs
posted by res0rsef
7 comments posted 21yrs posted by res0rsef

FPGA Article on Slashdot.

Jusr curious if anyone ran across the recent article about a project for '3rd world nations' that involved a FPGA based...
0 comments posted 21yrs
posted by Ziggy
0 comments posted 21yrs posted by Ziggy

VGA sync signals

I'm doing a VGA sync generator in a Virtex II and can't decide how to go about driving the HS and VS signals to the con...
8 comments posted 21yrs
posted by enquiries
8 comments posted 21yrs posted by enquiries

problems getting flex10k10 to work

I have a flex10k10lc84-4 and have just bulit a test circuit for it. I am using the MAX+plusII software. I made a simple...
2 comments posted 21yrs
posted by lennart.kirkevik
2 comments posted 21yrs posted by lennart.kirkevik

using cadence tool

hi, I have a problem in using the Silicon Ensemble (place and route). I am getting the following error while loading .L...
0 comments posted 21yrs
posted by madhav1111
0 comments posted 21yrs posted by madhav1111

Median Filter for floating points

Hi Folks, I was wondering what is the best way of finding the median of a floating point array in hardware. I am curren...
2 comments posted 21yrs
posted by paul.sw.lee
2 comments posted 21yrs posted by paul.sw.lee

Nuhorizons alternatives for Xilinx parts?

I am currently doing work on a small board with a FPGA and DSP. I have been planning to use the Xilinx XC3S1000-4FT256C...
1 comments posted 21yrs
posted by harmon.darrell
1 comments posted 21yrs posted by harmon.darrell

Patent issues in implementing embedded fpgas

Does anyone know if Xilinx, Altera, or some of the others hold key patents in fpga architectures that barr entry of som...
4 comments posted 21yrs
posted by olofsson
4 comments posted 21yrs posted by olofsson

signals in modelsim

Hi, how can I add internal signals to the wave output of modelsim? At the moment I have to add all the debug sinals to...
10 comments posted 21yrs
posted by benjamin
10 comments posted 21yrs posted by benjamin

how can I improve my code?

Hi, since I am a beginner with fpgas and vhdl, I want to ask if some fpga-veteran can give me some hints how to improve...
15 comments posted 21yrs
posted by benjamin
15 comments posted 21yrs posted by benjamin

Lvds input problem urgent

I have 2 signals that come from an lvds transmitter sources: lvds1p, lvds1n. I use an cyclone EP1C6. I want to put thes...
1 comments posted 21yrs
posted by dan.costin
1 comments posted 21yrs posted by dan.costin