Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15255 Threads Posts
to

Worth reading in Field-Programmable Gate Arrays

ALTERA EPXA1 SDRAM BUG

Hi all, have everyone experience about a second SDRAM with the Altera FPGA+HARCORE-CPU EPXA1? Its is unpossible for me...
0 comments posted 21yrs
posted by panse
0 comments posted 21yrs posted by panse

Memec Virtex-4 LX25 LC

Hello, I am working on the Virtex-4 LX25 LC for a project. Whenever I create edk project using Base Design builder for...
1 comments posted 21yrs
posted by cybershakith
1 comments posted 21yrs posted by cybershakith

A Short Pulse Catcher

Hello, In http://ocw.mit.edu/NR/rdonlyres/Electrical-Engineering-and-Computer-Science/6-111Introductory-Digital-Systems...
6 comments posted 21yrs
posted by tanceqi
6 comments posted 21yrs posted by tanceqi

FFT with FPGA

Hello, I want to implement a 128bit FFT with FPGA, do you have any reference design for me? Thanks in advance, Mike
4 comments posted 21yrs
posted by mail2mz
4 comments posted 21yrs posted by mail2mz

Jobs going in New Zealand

For anyone that's interested, my company (Endace Technology Ltd) is looking for VHDL engineers (And embedded software p...
7 comments posted 21yrs
posted by jeremy
7 comments posted 21yrs posted by jeremy

Simulation of rocket IO in virtex 2 pro

I am trying to fine some information about simulating the virtex 2 pro rocket io model in model sim for a couple of my...
3 comments posted 21yrs
posted by stephen.lohning
3 comments posted 21yrs posted by stephen.lohning

ISE and Linux

Does it function with every distribution of Linux? There is a way to try the 64 bit version or I need to recompile every...
6 comments posted 21yrs
posted by marcotoschi_no_spam
6 comments posted 21yrs posted by marcotoschi_no_spam

Serial Input Review and Questions

The included code is used to search a serial stream for a sync word and then set a data valid flag for the sync word an...
1 comments posted 21yrs
posted by
1 comments posted 21yrs posted by

Coloring by clock?

I'm getting tired of poring over my code to find asynchronous inputs to my state machines that make them go "zero hot."...
8 comments posted 21yrs
posted by gabor
8 comments posted 21yrs posted by gabor

Xilinx Webpack on Gentoo-64bit ?

Has anyone succeded to install Webpack for linux on non-RH based distro with modern 2.6 kernel etc ? I have recently tr...
0 comments posted 21yrs
posted by brane2
0 comments posted 21yrs posted by brane2

Pushing PicoBlaze

Our latest TechiTip on PicoBlaze posted here http://www.enterpoint.co.uk/techitips/Previous_TechiTips/techitips_pushing...
0 comments posted 21yrs
posted by removethisthenleavejea
0 comments posted 21yrs posted by removethisthenleavejea

Spartan 3 CPI

Hi, i am using the Spartan 3 (XC3S200) and the onboard clock on this FPGA works at 50Mhz, 20ns. Does anyone know how ma...
8 comments posted 21yrs
posted by amir.intisar
8 comments posted 21yrs posted by amir.intisar