Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15255 Threads Posts
to

Worth reading in Field-Programmable Gate Arrays

using internal POR

Hi all. I'm new to all this FPGA stuff. Recently bought the Xilinx Spartan-3 starter kit (now I regret not waiting 2 mo...
1 comments posted 20yrs
posted by drgenio
1 comments posted 20yrs posted by drgenio

Can some give me some advice?

If I want to know how the cpu work more detail,or if I want to know the internal archetecture in the risc cpu,what mater...
2 comments posted 20yrs
posted by bjzhangwn
2 comments posted 20yrs posted by bjzhangwn

TCL SCRIPT AND VHDL DESIGN

hii i have to study TCL SCRIPTING and i have to verify the VHDL codes, i have learnt this lannguage but have to verify...
2 comments posted 20yrs
posted by abrar_ahmed_313
2 comments posted 20yrs posted by abrar_ahmed_313

PPC405 on ISE

Hi everyone, Is there any way for me to start a project on Virtex2Pro utilizing the PPC405 core using ONLY ISE (i.e. wi...
5 comments posted 20yrs
posted by azman
5 comments posted 20yrs posted by azman

Brute Force Examination of a PLD

Lets discuss the brute force examination of a PAL16R8, for example, with absolutely no knowledge of its function. Lets...
7 comments posted 20yrs
posted by grant
7 comments posted 20yrs posted by grant

Xilinx ML402 DRAM control

I would like to capture an display video images using a Xilinx ML402 development kit. I am looking for advice about how...
1 comments posted 20yrs
posted by bradsmallridge
1 comments posted 20yrs posted by bradsmallridge

Actel Fusion

Anyone an idea about the availability and pricing of their starter kit. The new Fusion line looks very interesting. Alm...
2 comments posted 20yrs
posted by mschoebe
2 comments posted 20yrs posted by mschoebe

System Monitor in Virtex-4

I stumbled upon the System Monitor feature in the Virtex-4 handbook while looking for the DXN/DXP pins from Virtex-II f...
5 comments posted 20yrs
posted by larthe
5 comments posted 20yrs posted by larthe

FSM goes into invalid state after reset...

I have a design that is a one hot FSM. Sometime the FSM was locked up invalid state after reset. But I had set the defa...
2 comments posted 20yrs
posted by akun.cheng
2 comments posted 20yrs posted by akun.cheng

USB Printer Interface

Hallo, I'm developing a microcontroller based on Virtex-4FX. This system should send text to a USB printer. I think to...
2 comments posted 20yrs
posted by marcotoschi
2 comments posted 20yrs posted by marcotoschi

PCI interface on CYCLONE(ep1c6)

Hi,everybody. I have some questions about pci interface on Cyclone.Would someone help me? First,Which pins of PCI shoul...
1 comments posted 20yrs
posted by eehinjor
1 comments posted 20yrs posted by eehinjor