I stumbled upon the System Monitor feature in the Virtex-4 handbook while looking for the DXN/DXP pins from Virtex-II for temperature supervision. Perfect, just what we need! Both temperature and power supply supervision, without the hazzle of external SMBus measuring devices, voltage comparators and the like.
Only trouble is (gee wizz..) the feature is marked as "NOT supported" in Xilinx Answer Record 20102.
Since that option seems to be out the window, are there still means to supervise chip temperature? Or do we need to glue a sense diod atop each package? Or maybe the System Monitor will be revived in later stepping levels of silicon?
It seems these pins are renamed TDP/TDN in Virtex-4. Good, so we don't need to resort to glue...
I wonder if these pins are as succeptable to switching noise as DXP/DXN in the Virtex/Virtex-E/Virtex-II? It seems the only way to aquire a reliable reading is to stop clocking the device (Answer Record 11558). In my experiance, Virtex readings where fairly stable, Virtex-E (at least the devices I have used) gave a +15 degrees Celsius higher reading than was the case, and Virtex-II again where fine in most situations but could start to fluctuate wildly under certain conditions. Maybe it was my board that was badly layed out... We used the MAX1617A and the ADM1021.
Hi Lars, Well my V2PRO stuff works great and the FPGA is thrashing away while the measurement is going on. As you say, I am very careful with my layout. And I read the Maxim datasheet very carefully indeed! Good luck, Syms.
Well, it is a long, and rough road, but we fixed it. Or at least, we fixed everything that was wrong with it, or know how to, or have bits and pieces of it working. I believe in the most recent stepping all parts have 'working' (yet untested) system monitors.
What was left unfixed was gain error (the gain varies by more than we would like it to, but we know how to fix that, too - we just did not). The offset is automatically corrected, so that was never an issue. Linearity was broken, and now it is fixed. The Vccaux voltage sensor point also was measured at the wrong node (simple error, so we can do it right next time).
What is left is the core voltage sensor (which works), the temp sensor (which works), and the external voltage inputs, multiplexers, alarm levels, scanners, etc. which all work (save for the variation in gain that is beyond what we would have liked).
To re-introduce the feature this late in the game is just not possible, so we will chalk this experience up to experimental silicon prototyping that just happens to be in every part: and being on the "bleeding edge" of the technology, and learning just how difficult mixed signal IC design is (something we learn again and again, with each new technology it seems).
If we did reintroduce it, we would have to specify it, and then test it, and then deal with the yield loss for ones where it doesn't work. So, we won't (do any of that above). But we did do the test program, and screened enough to make sure that when we do it (again) we will be ready for it.
We are supporting the system monitor for anti-tamper methods security research, so it still has some (small) life in the real world.
Aust> It seems these pins are renamed TDP/TDN in Virtex-4. Good, so we don't
OK Austin, I sympathise. As a matter of fact, quite a few "bells and whistles" where scrapped in my recent projects, some of them would have been quite useful. Sometimes it is better to acknowledge the fact that it is just not worth the effort... It would have been nice though. Better luck next time! Me, I'll start looking for replacements for the MAX1617, that part has caused enough greif.
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