Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15254 Threads Posts
to

Altera Cyclone II DQ/DQS pins location

Hello group, I have an issue with porting my high-speed DDR interface to Altera Cyclone II device. As far as datasheet...
4 comments posted 20yrs
posted by v_mirgorodsky
4 comments posted 20yrs posted by v_mirgorodsky

Spartan 3 Power Supply Design

Hello Everyone, I am currently investigating my options for designing the power supply part for an imaging application....
5 comments posted 20yrs
posted by franzjakob
5 comments posted 20yrs posted by franzjakob

Microblaze FSL peripheral problem

Hello All! We are newbies to FPGAs and VHDL. We're doing a project on it and we need to have custom hardware for it. We...
5 comments posted 20yrs
posted by dotnetters
5 comments posted 20yrs posted by dotnetters

Support software for XC3042

Hi All, I was able to get a bunch of Xilinx XC3042 FPGAs from a dealer and am trying to find if there is any support so...
14 comments posted 20yrs
posted by g1powermac
14 comments posted 20yrs posted by g1powermac

Getting started w/ Aurora Core

Hi There, I need some help getting started with the aurora core. I'm trying to implement a simple serial protocol/data...
1 comments posted 20yrs
posted by bkamakot
1 comments posted 20yrs posted by bkamakot

What will the next FPGA IP-blocks be?

I suppose these will be announced quite soon once the Virtex5 manuals become accessible to mortals ... I was intrigued...
0 comments posted 20yrs
posted by twomack
0 comments posted 20yrs posted by twomack

bvci protocol for fpga

Hi all, i want to connect two fpga by bvci procotol. however, this will use closed to 100 PINs. So, i plan to fold the...
0 comments posted 20yrs
posted by u880939
0 comments posted 20yrs posted by u880939

HWICAP with the Virtex II Pro. Anybody? Bueller?

Hello, Does anybody out there actually know how to set up HWICAP in EDK Has anyone ever got this to work? If you've eve...
2 comments posted 20yrs
posted by srahrens2
2 comments posted 20yrs posted by srahrens2

Freeware request

Good day to one and all! Does anyone know of any freeware that essentially dumps out the vhdl code of digital filters?...
0 comments posted 20yrs
posted by rover8898
0 comments posted 20yrs posted by rover8898

EDK : PPC405 Interrupt question

Hi all, the ppc in edk has two interrupt inputs critical and exteranl.. if I choose to connect my peripheral_a interrup...
4 comments posted 20yrs
posted by me_2003
4 comments posted 20yrs posted by me_2003

Instantiating addsub, comparators in Xilinx

Hi there, currently I am trying to instantiate addsub components and comparators for resource sharing, because XST seem...
10 comments posted 20yrs
posted by nordicelf
10 comments posted 20yrs posted by nordicelf

help!! my modelsim occur error on strting

i am korean student studying for fpga I try use modelsim but occur error on starting! help me plz~ my system is windows...
0 comments posted 20yrs
posted by idkiller
0 comments posted 20yrs posted by idkiller