Hello, Does anybody out there actually know how to set up HWICAP in EDK Has anyone ever got this to work?
If you've ever looked into this, you know there's very littl documentation on how to setup and use HWICAP. Would someone please post C file instantiating, initializing, and perhaps even reading/writing frame through ICAP? That would be extremely helpful.
I am but a lowely univerisy student, and as such get zero support fro Xilinx on these or any other matters.
Thanks much, --scott
John Williams' "Partial Reconfiguration on Xilinx Devices" email list is another resource:
The archive is available here:
It works - I've even wrapped a Linux driver around it to make a self-reconfiguring MicroBlaze system. That was version 1.00.a - it's up to 1.00.b now but don't think much has changed.
The trick with this core is to realise that it's buffered - you send your reconfig frames to a BRAM buffer (memory mapped on the OPB bus), then trigger the core to do the actual reconfig.
Readback is the reverse - trigger the frame read, then get the data from the buffer.
In /path/to/edk/sw/XilinxProcessorIPLib/hwicap_v1_00_a is the source of the level 0 drivers, and some example code as well.
Also, in the core directory itself
/path/to/edk/hw/XilinxProcessorIPLib/pcores/opb_hwicap_v1_00_b.
/doc has a nice data sheet, and the /hdl subdirectory is the full source in nicely commented VHDL.
Use the source, Luke!
John
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