Latest threads in Field-Programmable Gate Arrays

MIG under Linux

Hi everybody, Did someone tried to install MIG under Linux using Wine? Cheers Mehdi

0 19yrs

taileb.mehdi

0 19yrs taileb.mehdi

Looking for Memory Recommendation for Spartan 3E 1200

Hi everyone, I'm working on a Board for Bus Interfacing and some Audio Processing, which will use Spartan 3E 1200 and t...

7 19yrs

matthias.einwag

7 19yrs matthias.einwag

Boot PowerPC on VirtexIIPro

Well I have a strange problem. I have a VirtexIIPro30 on a Sundance target. I use XPS 8.2.02 to create a design with a...

1 19yrs

pbantunez

1 19yrs pbantunez

RFC: VHDL testbench enhancements

Hi, Let me try this again. The VHDL standards community has been considering whether to enhance VHDL to add advanced te...

5 19yrs

jim

5 19yrs jim

QUIP write_verilog.c

Hi- I have been using the QUIP package and have one question regarding integration with SIS. I have been reading the qu...

0 19yrs

trackmanatISU

0 19yrs trackmanatISU

re-assemble bootloader for NIOS Processor

Hello, I want to recompile the bootloader for the Nios processor. The reason that I want to do this is: - I use an EPCS...

2 19yrs

Karel.Deprez

2 19yrs Karel.Deprez

Implement IIR Filter on FPGA

hi people, I'm designing filter system called IIR filter on the FPGA kit, but it doesn't work when I implement on FPGA....

6 19yrs

gordonfreeman1983

6 19yrs gordonfreeman1983

ISE 9.1i SP3 simulator problems on Linux

When trying to run the WebPack ISE 9.1i SP3 simulator on Linux (Gentoo, specifically), it always stops building the sim...

3 19yrs

koch

3 19yrs koch

X_OBUF and other error messages with ModelSim

I am trying to perform a Post-Translate simulation of a design, but I'm getting a huge number of errorts that are basic...

1 19yrs

mhs000

1 19yrs mhs000

Does the XC3S250E-VQ100 exist?

I have an application that is very space limited, and would like to use a Spartan XC3S250E in the VQ100 package. Even t...

6 19yrs

jshamlet

6 19yrs jshamlet

Dynamic Reconfig

Hello, I would really appreciate if you could give me some insight on the following -Can you guide me to a link/example...

2 19yrs

prasad.anirudh

2 19yrs prasad.anirudh

MGT Digital Receiver Oversampling

I started working with the MGT's recently on a V4 PCI-E development board. I am just using the digital recevier in over...

0 19yrs

mottoblatto

0 19yrs mottoblatto

Standard PCI Xilinx board with Ethernet port

Hi All, Would anyone please tell me to find a standard PCI FPGA Xilinx board with ethernet port ? Thanks Thuy

1 19yrs

thuyp

1 19yrs thuyp

verilog genvar, and 2D array access

Hi all, I'm trying to generate 32 16bits registers using verilog generate : reg [15:0] Data_reg [N_REG-1:0]; reg [N_REG...

1 19yrs

michel.talon

1 19yrs michel.talon

SVF Player

Dear all, We are searching a company having a large Xilinx VIRTEX and/or a large Altera STRATIX for testing our SVF pla...

0 19yrs

laurent.gauch

0 19yrs laurent.gauch

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