I am trying to perform a Post-Translate simulation of a design, but I'm getting a huge number of errorts that are basically a replication of these following 3 erros:
# ** Error: netgen/translate/FPGA_translate.vhd(8083): No actual specified for gsr.
# ** Error: netgen/translate/FPGA_translate.vhd(29201): (vcom-1142) 'x_obuft' is an unknown component name.
# ** Error: netgen/translate/FPGA_translate.vhd(29202): Statement cannot be labeled.
Can anybody help resolving these errors? I couldnt find anything on the internet or Xilinx website.
I'm using Xilinx 9.1i with ModelSim XE III/Starter 6.0a
Thank you!